LAN89218 datasheet(45/148 Pages) MICROCHIP

45 / 148 page

 2008-2015 Microchip Technology Inc.

DS60001255B-page 45

LAN89218

The LAN89218 can be programmed to start payload transmission of a buffer on a byte boundary by setting the “Data

Start Offset” field in the TX command. The “Data Start Offset” field points to the actual start of the payload data within

the first 8 DWORDs of the buffer. Data before the “Data Start Offset” pointer will be ignored. When a packet is split

into multiple buffers, each successive buffer may begin on any arbitrary byte.

The LAN89218 can be programmed to strip padding from the end of a transmit packet in the event that the end of

the packet does not align with the host burst boundary. This feature is necessary when the LAN89218 is operating

in a system that always performs multi-word bursts. In such cases the LAN89218 must guarantee that it can accept

data in multiples of the Burst length regardless of the actual packet length. When configured to do so, the LAN89218

will accept extra data at the end of the packet and will remove the extra padding before transmitting the packet. The

LAN89218 automatically removes data up to the boundary specified in the Buffer End Alignment field specified in

each TX command.

The host can instruct the LAN89218 to issue an interrupt when the buffer has been fully loaded into the TX FIFO

contained in the LAN89218 and transmitted. This feature is enabled through the TX command ‘Interrupt on

Completion’ field.

Upon completion of transmission, irrespective of success or failure, the status of the transmission is written to the

TX status FIFO. TX status is available to the host and may be read using PIO operations. An interrupt can be

optionally enabled by the host to indicate the availability of a programmable number TX status DWORDS.

Before writing the TX command and payload data to the TX FIFO, the host must check the available TX FIFO space

by performing a PIO read of the TX_FIFO_INF register. The host must ensure that it does not overfill the TX FIFO

or the TX Error (TXE) flag will be asserted.

The host proceeds to write the TX command by first writing TX command ‘A’, then TX command ‘B’. After writing the

command, the host can then move the payload data into the TX FIFO. TX status DWORDs are stored in the TX

status FIFO to be read by the host at a later time upon completion of the data transmission onto the wire.

FIGURE 3-20:

SIMPLIFIED HOST TX FLOW DIAGRAM

Idle

Check

available

FIFO

space

init

Write

Command

Write

Buffer

Last Buffer in

Packet

Not Last Buffer

Write

Start

Padding

(optional)

Read TX

Status

(optional)

TX Status

Available

LAN89218 Datasheet(PDF) 45 Page - Microchip Technology

LAN89218 Datasheet(HTML) 45 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL