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LAN89218 Datasheet(PDF) 95 Page - Microchip Technology |
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LAN89218 Datasheet(HTML) 95 Page - Microchip Technology |
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95 / 148 page ![]() 2008-2015 Microchip Technology Inc. DS60001255B-page 95 LAN89218 0 Flow Control on Any Frame (FCANY). When this bit is set, the LAN89218 will assert back pressure, or transmit a pause frame when the AFC level is reached and any frame is received. Setting this bit enables full-duplex flow control when the LAN89218 is operating in full-duplex mode. When this mode is enabled during half-duplex operation, the Flow Controller does not decode the MAC address and will send a pause frame upon receipt of a valid preamble (i.e., immediately at the beginning of the next frame after the RX data FIFO level is reached). When this mode is enabled during full-duplex operation, the Flow Controller will immediately instruct the MAC to send a pause frame when the RX data FIFO level is reached. The MAC will queue the pause frame transmission for the next available window. Setting this bit overrides bits [3:1] of this register. R/W 0 TABLE 5-5: BACKPRESSURE DURATION BIT MAPPING Backpressure Duration [19:16] 100 Mbps Mode 10 Mbps Mode 0h 5 µs 7.2 µs 1h 10 µs 12.2 µs 2h 15 µs 17.2 µs 3h 25 µs 27.2 µs 4h 50 µs 52.2 µs 5h 100 µs 102.2 µs 6h 150 µs 152.2 µs 7h 200 µs 202.2 µs 8h 250 µs 252.2 µs 9h 300 µs 302.2 µs Ah 350 µs 352.2 µs Bh 400 µs 402.2 µs Ch 450 µs 452.2 µs Dh 500 µs 502.2 µs Eh 550 µs 552.2 µs Fh 600 µs 602.2 µs Bits Description Type Default |
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