LAN9211 datasheet(130/147 Pages) SMSC

Part #	LAN9211

Description	High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

PDF	147 Pages

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Manufacturer	SMSC [SMSC Corporation]

Direct Link	http://www.smsc.com

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

Revision 2.9 (03-01-12)

130

SMSC LAN9211

DATASHEET

6.3

PIO Burst Reads

In this mode, performance is improved by allowing up to 16 WORD read cycles back-to-back. PIO

Burst Reads can be performed using Chip Select (nCS) or Read Enable (nRD). Either or both of these

control signals must go high between bursts for the period specified.

Note: The “Data Bus” width is 16 bits

Note: A PIO Burst Read cycle begins when both nCS and nRD are asserted. The cycle ends when

either or both nCS and nRD are deasserted. They may be asserted and deasserted in any

order.

Figure 6.2 PIO Burst Read Cycle Timing

Table 6.4 PIO Burst Read Timing

SYMBOL

DESCRIPTION

MIN

TYP

MAX

UNITS

tcsh

nCS, nRD Deassertion Time

tcsdv

nCS, nRD Valid to Data Valid

tacyc

Address Cycle Time

tasu

Address Setup to nCS, nRD valid

tadv

Address Stable to Data Valid

tah

Address Hold Time

tdon

Data Buffer Turn On Time

tdoff

Data Buffer Turn Off Time

tdoh

Data Output Hold Time

Data Bus

nCS, nRD

A[7:5]

A[4:1]

LAN9211 Datasheet(PDF) 130 Page - SMSC Corporation

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