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TUSB422 Datasheet(PDF) 55 Page - Texas Instruments |
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TUSB422 Datasheet(HTML) 55 Page - Texas Instruments |
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55 / 71 page  55 TUSB422 www.ti.com SLLSEW6 – NOVEMBER 2016 Product Folder Links: TUSB422 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.6.58 Vendor Interrupts Mask Register (address = 0x92) [reset = 0x00] Figure 66. Vendor Interrupts Mask Register 7 6 5 4 3 2 1 0 Reserved LFO_TIMER_M ASK CC_FAULT_M ASK OTSD_MASK Reserved FAST_ROLE_S WAP_MASK R RW RW RW R RW LEGEND: R/W = Read/Write; R = Read only Table 63. Vendor Interrupts Mask Register Descriptions Bit Field Type Reset Description 7:5 Reserved R 000 Reserved 4 LFO_TIMER_MASK RW 0 0b: Interrupt masked. 1b: Interrupt unmasked 3 CC_FAULT_MASK RW 0 0b: Interrupt masked. 1b: Interrupt unmasked 2 OTSD_MASK RW 0 0b: Interrupt masked. 1b: Interrupt unmasked 1 Reserved RW 0 Reserved 0 FAST_ROLE_SWAP_MASK RW 0 0b: Interrupt masked. 1b: Interrupt unmasked |
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