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TUSB422 Datasheet(PDF) 64 Page - Texas Instruments |
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TUSB422 Datasheet(HTML) 64 Page - Texas Instruments |
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64 / 71 page ![]() CC2 A1 A2 A3 B1 B3 C1 C2 C3 VBUSIN VDD VCONN SCL SDA CC1 B2 64 TUSB422 SLLSEW6 – NOVEMBER 2016 www.ti.com Product Folder Links: TUSB422 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 10 Layout 10.1 Layout Guidelines 1. Trace width and thickness size for CC1, CC2, and VCONN should be set to meet at least 1 Watt. 2. A 0.1 µF capacitor should be placed as close as possible to TUSB422 VDD pin. Figure 78 shows via-in-pad for inner pad B2. This is due to the tight placing between two pads. If PCB manufacturing restrictions allows for very small width traces like 2 mils, then via-in-pad is not needed. 10.2 Layout Example Figure 78. Example Layout |
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