TUSB422 datasheet(6/71 Pages) TI1

6 / 71 page

TUSB422

SLLSEW6 – NOVEMBER 2016

www.ti.com

Product Folder Links: TUSB422

Submit Documentation Feedback

Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VTH(DFP_CC_MED)

Voltage threshold for detecting a UFP attach

when TUSB422 is advertising medium

current (1.5A) source capability.

1.51

1.6

1.64

VTH(DFP_CC_HIGH)

Voltage threshold for detecting a UFP attach

when TUSB422 is advertising high current

(3.0A) source capability.

2.46

2.6

2.74

VTH(AC_CC_USB)

Voltage threshold for detecting a active

cable attach when advertising default current

0.15

0.2

0.25

VTH(AC_CC_MED)

Voltage threshold for detecting a active

cable attach when advertising medium

current

0.35

0.4

0.45

VTH(AC_CC_HIGH)

Voltage threshold for detecting a active

cable attach when advertising high current.

0.76

0.8

0.84

ICC(DEFAULT_P)

Default mode pull-up current source when

advertising default current.

µA

ICC(MED_P)

Medium (1.5A) mode pull-up current source

when advertising medium current.

166

180

194

µA

ICC(HIGH_P)

High (3.0A) mode pull-up current source

when advertising high current.

VDD > 3 V

304

330

356

µA

RTX(PD)

Output impedance of CC1/CC2 during TX

when operating in PD mode and driving the

CC line.

At 750 KHz

RTX(FRS_PD)

Fast Role Swap request transmit driver

resistance (excluding cable resistance)

VOH(PD)

Transmit high voltage when operating in PD

mode

1.05

1.125

1.2

VOL(PD)

Transmit low voltage when operating in PD

mode.

0.07

RRX(PD)

Receiver input impedance. Does Not include

pull-up or pulldown resistance from cable

detect.

TX is Hi-Z

MΩ

VRX(FRS_PD)

Fast role swap request voltage detection

threshold

0.49

0.52

0.55

VIH(PD_SRC)

Input high voltage when sourcing power.

Selected when POWER_ROLE = 1.

0.8925

1.5325

VIH(PD_SNK)

Input high voltage when sinking power.

Selected when POWER_ROLE = 0.

0.6425

1.5325

VIL(PD_SRC)

Input low voltage when sourcing power.

Selected when POWER_ROLE = 1.

–0.3325

0.4825

VIL(PD_SNK)

Input low voltage when sinking power.

Selected when POWER_ROLE = 0.

–0.3325

0.2325

CRX(SHUNT)

External shunt capacitance on both CC1 and

CC2.

200

450

Control Pins: INT_N

I(INTN_LEAK)

INT_N leakage

VDD = 0 V; 0 < INT_N < 3.3 V

–1

µA

VOL

Low-level signal output voltage

IOL = –2 mA

0.4

I2C (SDA and SCL). VDD must be above 3V to operate at 3.3V I2C levels

VIH(I2C)

High-level input signal voltage

1.2

VIL(I2C)

Low-level input signal voltage

0.4

VOL(I2C)

Low-level signal output voltage (open-drain)

0.4

IOL(I2C)

Low level output current

I(I2C_LKG)

Leakage through SDA and SCL pins

VDD = 0 V; pin pulled up to 3.6 V

–1

µA

C(I2C)

Capacitance for SDA and SCL pins

C(I2C_FM+_BUS)

I2C bus capacitance for FM+ (1MHz)

150

C(I2C_FM_BUS)

I2C bus capacitance for FM (400KHz)

150

R(EXT_I2C_FM+)

External resistors on both SDA and SCL

when operating at FM+ (1MHz)

C(I2C_FM+_BUS) = 150pF

620

820

910

R(EXT_I2C_FM)

External resistors on both SDA and SCL

when operating at FM (400KHz)

C(I2C_FM_BUS) = 150pF

620

1500

2200

TUSB422 Datasheet(PDF) 6 Page - Texas Instruments

TUSB422 Datasheet(HTML) 6 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

Datasheet Download

Link URL