4.5V to 28V Input, Synchronous PWM Buck Controllers

for DDR Termination and Point-of-Load Applications

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17

Predischarge Mode

The MAX8553/MAX8554 discharge the output to GND

before the digital soft-start begins. When EN/HSD (EN)

is pulled high, the MAX8553 (MAX8554) starts an inter-

output to GND through the low-side MOSFET. If the out-

put voltage is above ground before enable, the output

voltage goes slightly negative due to energy stored in

the output LC. If the load cannot tolerate a negative volt-

age, place a power Schottky diode from the output to

PGND (anode to PGND) to act as a reverse-polarity

clamp. The period for this discharge mode is 1.7ms.

Both the buck controller and the VTTR buffer are turned

off during this period. After the predischarge period,

both the buck controller and the VTTR buffer are turned

on and go through soft-start.

Digital Soft-Start

The digital soft-start allows a gradual increase of the

internal current-limit level during startup to reduce the

input surge current. The MAX8553/MAX8554 divide the

soft-start period into five phases. During the first phase,

the controller limits the current limit to only 20% of the

full current limit. If the output does not reach the regula-

tion within 425µs, soft-start enters the second phase

and the current limit is increased by another 20%. This

process repeats until the maximum current limit is

reached (after 1.7ms) or when the output reaches the

nominal regulation voltage, whichever occurs first.

Adding a capacitor in parallel with the external ILIM

resistor creates a continuously adjustable analog soft-

start function. If the foldback current-limiting feature is

implemented in the application circuit, the maximum

current limit is also a function of the output voltage and

the resistors connected to ILIM.

Power-Good Output (POK)

POK is the open-drain output of the internal window

comparators that continuously monitor VTT and VTTR

for the MAX8553 and FB for the MAX8554. POK is

actively held low in shutdown, and becomes high

impedance when the outputs are within 12% of their

respective nominal regulation voltage.

Overvoltage Protection (OVP)

When the buck output voltage rises above 120% of the

nominal regulation voltage, the OVP circuit sets the

fault latch, shuts down the PWM controller, and immedi-

ately pulls DH low and forces DL high. The negative

current limit is also disabled. This turns on the low-side

MOSFET, which rapidly discharges the output capaci-

tors and clamps the output to ground. Note that imme-

diately latching DL high can cause the output voltage

to go slightly negative due to energy stored in the out-

put LC at the instant the OVP occurs. If the load cannot

tolerate a negative voltage, place a power Schottky

diode from the output to PGND (anode to PGND) to act

as a reverse-polarity clamp. Cycle EN or input power to

reset the latch.

Overcurrent Protection

The current-limit circuit employs a unique “valley” cur-

rent-sensing algorithm that uses the on-resistance of

the low-side MOSFET as a current-sensing element. If

the current-sense signal is above the current-limit

threshold, the PWM is not allowed to initiate a new

cycle. The actual peak current is greater than the cur-

rent-limit threshold by an amount equal to the inductor

limit characteristic and maximum load capability are a

function of the MOSFET on-resistance, the inductor

value, and the input voltage. The reward for this uncer-

tainty is robust, lossless overcurrent sensing. There is

also a negative current limit that prevents excessive

The negative current-limit threshold is set to approxi-

mately 110% of the positive current limit, and therefore

tracks the positive current limit when ILIM is adjusted.

The current-limit threshold can be adjusted with an

current source at ILIM sets a voltage drop on this resis-

tor, adjusting the current-limit threshold from approxi-

mately 50mV to 200mV. In the adjustable mode, the

current-limit threshold voltage is precisely 1/10 the volt-

2k

Ω/mV of the current-limit threshold. The threshold

defaults to 100mV when ILIM is connected to VL. The

logic threshold for switchover to the 100mV default

limit can accommodate various MOSFETs. Alternately,

foldback current limit can also be implemented by

Current Limit section.