 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AM79C970 Datasheet(PDF) 98 Page - Advanced Micro Devices |
|
|
|||||||||||||||||||||||||||||
AM79C970 Datasheet(HTML) 98 Page - Advanced Micro Devices |
|
|
98 / 168 page  P R E L I M I N A R Y AMD 1-965 Am79C970 CSR32: Next Transmit Descriptor Address Lower Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 NXDAL Contains the lower 16 bits of the next TDRE address pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR33: Next Transmit Descriptor Address Upper Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 NXDAU Contains the upper 16 bits of the next TDRE address pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR34: Current Transmit Descriptor Address Lower Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 CXDAL Contains the lower 16 bits of the current TDRE address pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR35: Current Transmit Descriptor Address Upper Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 CXDAU Contains the upper 16 bits of the current TDRE address pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR36: Next Next Receive Descriptor Address Lower Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 NNRDAL Contains the lower 16 bits of the next next receive descriptor ad- dress pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR37: Next Next Receive Descriptor Address Upper Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 NNRDAU Contains the upper 16 bits of the next next receive descriptor ad- dress pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR38: Next Next Transmit Descriptor Address Lower Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 NNXDAL Contains the lower 16 bits of the next next transmit descriptor ad- dress pointer. Read/write accessible only when STOP bit is set. These bits are unaffected by H_RESET, S_RESET or STOP. CSR39: Next Next Transmit Descriptor Address Upper Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
