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AD9144-EBZ Datasheet(PDF) 90 Page - Analog Devices

Part # AD9144-EBZ
Description  Multiple chip synchronization
PDF  126 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9144-EBZ Datasheet(HTML) 90 Page - Analog Devices

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Data Sheet
AD9144
Rev. A | Page 89 of 125
Reg.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
R/W
0x141
GAIN_RAMP_
UP_STEP1
RESERVED
GAIN_RAMP_UP_STEP[11:8]
0x00
R/W
0x142
GAIN_RAMP_
DOWN_STEP0
GAIN_RAMP_DOWN_STEP[7:0]
0x09
R/W
0x143
GAIN_RAMP_
DOWN_STEP1
RESERVED
GAIN_RAMP_DOWN_STEP[11:8]
0x00
R/W
0x146
DEVICE_CONFIG_
REG_1
DEVICE_CONFIG_1
0x00
R/W
0x147
BSM_STAT
SOFTBLANKRB
RESERVED
0x00
R
0x14B
PRBS
PRBS_
GOOD_Q
PRBS_
GOOD_I
RESERVED
PRBS_MODE
PRBS_RESET
PRBS_EN
0x10
R/W
0x14C
PRBS_ERROR_I
PRBS_COUNT_I
0x00
R
0x14D
PRBS_ERROR_Q
PRBS_COUNT_Q
0x00
R
0x1B0
DACPLLT0
DAC_PLL_PWR
0xFA
R/W
0x1B5
DACPLLT5
RESERVED
VCO_VAR
0x83
R/W
0x1B9
DACPLLT9
DAC_PLL_CP1
0x34
R/W
0x1BB
DACPLLTB
RESERVED
VCO_BIAS_TCF
VCO_BIAS_REF
0x0C
R/W
0x1BC
DACPLLTC
DAC_PLL_VCO_CTRL
0x00
R/W
0x1BE
DACPLLTE
DAC_PLL_VCO_PWR
0x00
R/W
0x1BF
DACPLLTF
DAC_PLL_VCOCAL
0x8D
R/W
0x1C0
DACPLLT10
DAC_PLL_LOCK_CNTR
0x2E
R/W
0x1C1
DACPLLT11
DAC_PLL_CP2
0x24
R/W
0x1C4
DACPLLT17
DAC_PLL_VAR1
0x33
R/W
0x1C5
DACPLLT18
DAC_PLL_VAR2
0x08
R/W
0x200
MASTER_PD
RESERVED
SPI_PD_
MASTER
0x01
R/W
0x201
PHY_PD
SPI_PD_PHY
0x00
R/W
0x203
GENERIC_PD
RESERVED
SPI_
SYNC1_PD
SPI_
SYNC2_PD
0x00
R/W
0x206
CDR_RESET
RESERVED
SPI_CDR_
RESETN
0x01
R/W
0x230
CDR_OPERATING_
MODE_REG_0
RESERVED
ENHALFRATE
RESERVED
CDR_
OVERSAMP
RESERVED
0x28
R/W
0x232
DEVICE_CONFIG_
REG_3
DEVICE_CONFIG_3
0x0
R/W
0x268
EQ_BIAS_REG
EQ_POWER_MODE
RESERVED
0x62
R/W
0x280
SERDESPLL_
ENABLE_CNTRL
RESERVED
RECAL_
SERDESPLL
RESERVED
ENABLE_
SERDESPLL
0x00
R/W
0x281
PLL_STATUS
RESERVED
SERDES_PLL_
OVERRANGE_
H
SERDES_PLL_
OVERRANGE_L
SERDES_PLL_CAL_
VALID_RB
RESERVED
SERDES_PLL_
LOCK_RB
0x00
R
0x284
LOOP_FILTER_1
LOOP_FILTER_1
0x77
R/W
0x285
LOOP_FILTER_2
LOOP_FILTER_2
0x87
R/W
0x286
LOOP_FILTER_3
LOOP_FILTER_3
0x08
R/W
0x287
SERDES_PLL_CP1
SERDES_PLL_CP1
0x3F
R/W
0x289
REF_CLK_
DIVIDER_LDO
RESERVED
DEVICE_
CONFIG_4
SERDES_PLL_DIV_MODE
0x00
R/W
0x28A
VCO_LDO
SERDES_PLL_VCO_LDO
0x2B
R/W
0x28B
SERDES_PLL_PD1
SERDES_PLL_PD1
0x7F
R/W
0x290
SERDESPLL_VAR1
SERDES_PLL_VAR1
0x83
R/W
0x294
SERDES_PLL_CP2
SERDES_PLL_CP2
0xB0
R/W
0x296
SERDESPLL_VCO1
SERDES_PLL_VCO1
0x0C
R/W
0x297
SERDESPLL_VCO2
SERDES_PLL_VCO2
0x00
R/W



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