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Pin Descriptions

Name

I/O

Typ

Description

vsrvdd

Analog bidirectional, it should be connect to ground via a 1.0

µf capacitor. This pin is the

internal charge pump voltage source.

vrl

Anti blooming pin. This pin is normally tied to ground.

vdd_pix

3.3 volt supply for the pixel array.

irq

Digital output, the interrupt request pin. This pin generates interrupts during snapshot

mode.

sadr

Digital input with pull down resistor. This pin is used to program different slave addresses

for the sensor in an I

2C compatible system.

sda

2C compatible serial interface data bus. The output stage of this pin has an open drain

driver.

sclk

I2C compatible serial interface clock.

snapshot

Digital input with pull down resistor used to activate (trigger) a snapshot sequence.

resetb

Digital input with pull up resistor. When forced to a logic 0 the sensor is reset to its default

power up state. The resetb signal is internally synchronized to mclk which must be run-

ning for a reset to occur.

pdwn

Digital input with pull down resistor. When forced to a logic 1 the sensor is put into power

down mode.

vss_dig

0 volt power supply for the digital circuits.

vdd_dig

3.3 volt power supply for the digital circuits.

hsync

Digital Bidirectional. This is a dual mode pin. When the sensor’s digital video port is con-

figured to be a master, (the default), this pin is an output and is the horizontal synchroni-

zation pulse. When the sensor’s digital video port is configured to be a slave, this pin is

an input and is the row trigger.

vsync

Digital Bidirectional. This is a dual mode pin. When the sensor’s digital video port is con-

figured to be a master, (the default), this pin is an output and is the vertical synchroniza-

tion pulse. When the sensor’s digital video port is configured to be a slave, this pin is an

input and is the frame trigger.

pclk

Digital output. The pixel clock.

mclk

Digital input. The sensor’s master clock input.

Digital output. Bit 0 of the digital video output bus. This output can be put into tri-state

mode.

Pin not used, do not connect.

Digital output. Bit 1 of the digital video output bus. This output can be put into tri-state

mode.

Digital output. Bit 2 of the digital video output bus. This output can be put into tri-state

mode.

Digital output. Bit 3 of the digital video output bus. This output can be put into tri-state

mode.

Digital output. Bit 4 of the digital video output bus. This output can be put into tri-state

mode.

Digital output. Bit 5 of the digital video output bus. This output can be put into tri-state

mode.

Digital output. Bit 6 of the digital video output bus. This output can be put into tri-state

mode.

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