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NSC800N Datasheet(PDF) 56 Page - National Semiconductor (TI) |
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NSC800N Datasheet(HTML) 56 Page - National Semiconductor (TI) |
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56 / 76 page  1214 Program Control (Continued) DJNZ d Decrement the B register and conditionally jump to program location calculated with respect to the program counter and the displacement d based on the contents of the B register B w B b 1 No flags affected If B e 0 continue else PC w PC a d 76543210 00010000 d b 2 Timing If B i 0 M cycles 3 T states 13 (5 3 5) If B e 0 M cycles 2 T states 8 (5 3) Addressing Mode PC Relative CALLS CALL nn Unconditional call to subroutine at location nn (SP b 1) w PCH No flags affected (SP b 2) w PCL SP w SP b 2 PC w nn 76543210 11001101 n (low-order byte) n (high-order byte) Timing M Cycles 5 T states 17 (4 3 4 3 3) Addressing Mode Direct CALL cc nn Conditional call to subroutine at location nn based on test- able flag stages If cc true No flags affected (SP b 1) w PCH (SP b 2) w PCL SP w SP b 2 PC w nn else continue 765 4 3210 11 cc 100 n (low-order byte) n (high-order byte) Timing If cc true M cycles 5 T states 17 (4 3 4 3 3) If cc not true M cycles 3 T states 10 (4 3 3) Addressing Mode Direct RETURNS RET Unconditional return from subroutine or other return to pro- gram location pointed to by the top of the stack PCL w (SP) No flags affected PCH w (SP a 1) SP w SP a 2 76543210 11001001 Timing M cycles 3 T states 10 (4 3 3) Addressing Mode Register Indirect RET cc Conditional return from subroutine or other return to pro- gram location pointed to by the top of the stack If cc true No flags affected PCL w (SP) PCH w (SP a 1) SP w SP a 2 else continue 76543210 11 cc 000 Timing If cc true M cycles 3 T states 11 (5 3 3) If cc not true M cycles 1 T states 5 Addressing Mode Register Indirect RETI Unconditional return from interrupt handling subroutine Functionally identical to RET instruction Unique opcode al- lows monitoring by external hardware PCL w (SP) No flags affected PCH w (SP a 1) SP w SP a 2 76543210 11101101 01001101 Timing M cycles 4 T states 14 (4 4 3 3) Addressing Mode Register Indirect 56 |
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