Electronic Components Datasheet Search
  English  ▼

X  

NSC800N Datasheet(PDF) 14 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # NSC800N
Description  NSC800TM High-Performance Low-Power CMOS Microprocessor
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

NSC800N Datasheet(HTML) 14 Page - National Semiconductor (TI)

Back Button NSC800N Datasheet HTML 10Page - National Semiconductor (TI) NSC800N Datasheet HTML 11Page - National Semiconductor (TI) NSC800N Datasheet HTML 12Page - National Semiconductor (TI) NSC800N Datasheet HTML 13Page - National Semiconductor (TI) NSC800N Datasheet HTML 14Page - National Semiconductor (TI) NSC800N Datasheet HTML 15Page - National Semiconductor (TI) NSC800N Datasheet HTML 16Page - National Semiconductor (TI) NSC800N Datasheet HTML 17Page - National Semiconductor (TI) NSC800N Datasheet HTML 18Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 14 / 76 page
background image
80 Functional Description (Continued)
847 Zero Flag (Z)
Loading a zero in the accumulator or when a zero results
from an operation sets the zero flag
The following operations affect the zero flag

Adds (16-bit with carry 8-bit withwithout carry)

Subtracts (16-bit with carry 8-bit withwithout carry)

Logic Operations

Increments and Decrements

Rotate and Shifts

Rotate Digits

Decimal Adjust

Input Register Indirect

Block IO (always set after auto repeat block IO)

Block Searches

Load of I and R Registers

Bit Tests

Negation of Accumulator
The Z flag has no signficance immediately after the follow-
ing operations
 Block Transfers
Other operations do not affect the zero flag
848 Sign Flag (S)
The sign flag stores the state of bit 7 (the most-signifi-
cant bit and sign bit) of the accumulator following an arith-
metic operation This flag is of use when dealing with signed
numbers
The sign flag is affected by the following operation accord-
ing to the result

Adds (16-bit with carry 8-bit withwithout carry)

Subtracts (16-bit with carry 8-bit withwithout carry)

Logic Operations

Increments and Decrements

Rotate and Shifts

Rotate Digits

Decimal Adjust

Input Register Indirect

Block Search

Load of I and R Registers

Negation of Accumulator
The S flag has no significance immediately after the follow-
ing operations

Block IO

Block Transfers

Bit Tests
Other operations do not affect the sign bit
849 Additional General-Purpose Registers
The other general-purpose registers are the B C D E H
and L registers and their alternate register set B’ C’ D’ E’
H’ and L’ The general-purpose registers can be used inter-
changeably
In addition the B and C registers perform special functions
in the NSC800 expanded IO capabilities particularly block
IO operations In these functions the C register can ad-
dress IO ports the B register provides a counter function
when used in the register indirect address mode
When used with the special condition jump instruction
(DJNZ) the B register again provides the counter function
8410 Alternate Configurations
The six 8-bit general purpose registers (BCDEHL) will
combine to form three 16-bit registers This occurs by con-
catenating the B and C registers to form the BC register the
D and E registers form the DE register and the H and L
registers form the HL register
Having these 16-bit registers allows 16-bit data handling
thereby expanding the number of 16-bit registers available
for memory addressing modes The HL register typically
provides the pointer address for use in register indirect ad-
dressing of the memory
The DE register provides a second memory pointer register
for the NSC800’s powerful block transfer operations The
BC register also provides an assist to the block transfer
operations by acting as a byte-counter for these operations
85 ARITHMETIC-LOGIC UNIT (ALU)
The arithmetic logic and rotate instructions are performed
by the ALU The ALU internally communicates with the reg-
isters and data buffer on the 8-bit internal data bus
86 INSTRUCTION REGISTER AND DECODER
During an opcode fetch the first byte of an instruction is
transferred from the data buffer (ie its on the internal data
bus) to the instruction register The instruction register feeds
the instruction decoder which gated by timing signals gen-
erates the control signals that read or write data from or to
the registers control the ALU and provide all required exter-
nal control signals
14



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com