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SC2200 Datasheet(PDF) 361 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # SC2200
Description  Thin Client On a Chip
PDF  433 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC2200 Datasheet(HTML) 361 Page - National Semiconductor (TI)

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Revision 3.0
361
www.national.com
Electrical Specifications (Continued)
ICC3ONTFT
I/O current contribution if TFT display is
used
30
50
mA
ICCCRT
If CRT interface is used: CCCRT Current @
VCCCRT = 3.3 (Nominal); CPU mode = On
60
80
mA
1.
fCLK ratings refer to internal clock frequency.
Table 8-5. DC Characteristics On Mode (Continued)
Symbol
Parameter1
Typ Avg
Abs Max
Unit
Comments
Table 8-6. DC Characteristics for Active Idle, Sleep, and Off Modes
Symbol
Parameter1
Min
Typ
Max
Unit
Comments
ICC3IDLE
fCLK = 233 MHz, I/O Current @ VIO =3.3V
(Nominal); CPU mode = Active Idle
230
mA
ICC for VIO
fCLK = 266 MHz, I/O Current @ VIO =3.3V
(Nominal); CPU mode = Active Idle
240
fCLK = 300 MHz, I/O Current @ VIO =3.3V
(Nominal); CPU mode = Active Idle
250
ICC3SLP
I/O Current @ VIO = 3.3V (Nominal);
CPU mode = Sleep
20
30
mA
ICC for VIO
2
ICOREIDLE
fCLK = 233 MHz, Core Current @ VCORE =
1.8V (Nominal); CPU mode = Active Idle
360
mA
ICC for VCORE
fCLK = 266 MHz, Core Current @ VCORE =
1.8V (Nominal); CPU mode = Active Idle
380
fCLK = 300 MHz, Core Current @ VCORE =
1.8V (Nominal); CPU mode = Active Idle
450
ICORESLP
Core Current @ VCORE = 1.8V (Nominal);
CPU mode = Sleep
20
30
mA
ICC for VCORE
2
Core Current @ VCORE = 2.0V (Nominal);
CPU mode = Sleep
20
30
ISBOFF
SB Current @ VSB =3.3V (Nominal);
CPU mode = Off
<1
mA
ISBLOFF
SBL Current @ VSBL =1.8V (Nominal);
CPU mode = Off
<1
mA
ICC for VSBL
3
SBL Current @ VSBL =2.0V (Nominal);
CPU mode = Off
<1
IBAT
BAT Current @ VBAT = 3.0 (Nominal);
CPU mode = Off
7µA
TC =25°C
1.
fCLK ratings refer to internal clock frequency.
2.
All inputs are at 0.2V or VIO – 0.2 (CMOS levels). All inputs are held static, and all outputs are unloaded (static IOUT =
0mA).
3.
All VSBL supplied inputs are at 0.2V or VSBL – 0.2 (CMOS levels). All inputs are held static, and all outputs are unloaded
(static IOUT =0 mA).



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