Revision 0.2 March 10, 2000

-25-

Register Descriptions

Technologies, Inc.

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Table 3. Packet Event Codes

Code

Name

DMA

Meaning

00/10 Event Tcode Error AT, AR,

IT, IR, IT

A bad Tcode is associated with this packet. The packet was flushed.

01/11

Event Short

Packet

The received data length was less than the packet’s data length (IR packet-per-buffer

mode only).

02/12 Event Long Packet

IR

The received data length was greater than the packet’s data length (IR packet-per-

buffer mode only).

03/13 Event Missing Ack

AT

A subaction gap was detected before an ack arrived

04/14

Event Underrun

AT, IT

An underrun occurred on the corresponding FIFO and the packet was truncated.

05/15

Event Overrun

IR

A receive FIFO overflowed during the reception of an isochronous packet.

06/16

Event Descriptor

Read

AT, AR,

IT, IR

An unrecoverable error occurred while the Host Controller was reading a descriptor

block.

07/17

Event Data Read

AT, IT

An error occurred while the Host Controller was attempting to read from host memory

in the data stage of descriptor processing.

08/18

Event Data Write AR, IR, IT An error occurred while the Host Controller was attempting to write to host memory

in the data stage of descriptor processing.

09/19

Event Bus Reset

AR

Identifies a PHY packet in the receive buffer as being the synthesized bus reset packet

0A/1A

Event Timeout

AT

Indicates that the asynchronous transmit response packet expired and was not

transmitted

0B

Event Tcode Error

AT

A bad Tcode is associated with this packet. The packet was flushed.

0C-

0D/1B

-1D

Reserved

0E/1E

Event Unknown

AT, AR,

IT, IR

An error condition has occurred that cannot be represented by any other defined event

codes

0F/1F

Event Flushed

AT

Sent by the link side of the output FIFO when asynchronous packets are being flushed

due to a bus reset

11

Ack Complete

AT, AR,

IT, IR

The destination node has successfully accepted the packet. If the packet was a request

subaction, the destination node has successfully completed the transaction and no

response subaction shall follow.

The ack / err code for transmitted PHY, isochronous and broadcast packets, none of

which yield an ack code, will be set by hardware to “Ack Complete” unless an “Event

Underrun” or “Event Data Read” occurs.

12

Ack Pending

AT, AR

The destination node has successfully accepted the packet. If the packet was a request

subaction, a response subaction will follow at a later time. This code is not returned

for a response subaction.

13

Reserved

14

Ack Busy X

AT

The packet could not be accepted after max “ATretries” attempts and the last ack

received was “Ack Busy X.”

15

Ack Busy A

AT

The packet could not be accepted after max “ATretries” attempts and the last ack

received was “Ack Busy A." OHCI does not support the dual phase retry protocol for

transmitted packets, so this ack should not be received.

16

Ack Busy B

AT

The packet could not be accepted after max “ATretries” attempts and the last ack

received was “Ack Busy B" (see note for “Ack Busy A”).

17-1C

Reserved

1D

Ack Data Error

AT, IR

The destination node could not accept the block packet because the data field failed

the CRC check or because the length of the data block payload did not match the

length contained in the “Data Length” field. This code is not returned for any packet

that does not have a data blocik payload.

1E

Ack Type Error

AT, AR

Returned when a received block write request or received block read request is greater

than “max_rec”

1F

Reserved