VT6305 datasheet(13/35 Pages) ETC

13 / 35 page

Revision 0.2 March 10, 2000

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REGISTERS

The following tables summarize the configuration and I/O

registers of the VT6305.

These tables also document the

power-on default value (“Default”) and access type (“Acc”) for

each register.

Access type definitions used are RW

(Read/Write), RO (Read/Only), “—” for reserved / used

(essentially the same as RO), and RWC (or just WC) (Read /

Write 1’s to Clear individual bits). Registers indicated as RW

may have some read/only bits that always read back a fixed

value (usually 0 if unused); registers designated as RWC or

WC may have some read-only or read write bits (see

individual register descriptions for details).

Detailed register descriptions are provided in the following

section of this document.

All offset and default values are

shown in hexadecimal unless otherwise indicated

Table 2. Registers

PCI Function 0 Registers – Controller Configuration

Configuration Space Header Registers

Offset PCI Configuration Space Header

Default

Acc

1-0

Vendor ID

1106

3-2

Device ID

0130

5-4

Command

0000

7-6

Status

0280

Revision ID

Programming Interface

Sub Class Code

Base Class Code

-reserved- (cache line size)

—

Latency Timer

Header Type

-reserved- (Built In Self Test)

—

13-10 Base Address Register

0000 0000 RW

14-27 -reserved- (base address registers)

—

28-2B -reserved- (unassigned)

—

2C-2F -reserved- (subsystem ID read)

—

30-33 -reserved- (expan. ROM base addr)

—

34-3B -reserved- (unassigned)

—

Interrupt Line

Interrupt Pin

-reserved- (min gnt)

—

-reserved- (max lat)

—

Controller-Specific Configuration Registers

Offset Heading

Default

Acc

43-40 PCI HCI Control

0000 0000 RO

Miscellaneous Control

-reserved-

—

PHY Control

47-F3 -reserved-

—

Hide Function Register

F5-F7 -reserved-

—

FB-F8 Manufacturer ID

TBD

FC-FF -reserved-

—

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