VT6305 datasheet(18/35 Pages) ETC

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Revision 0.2 March 10, 2000

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Controller-Specific Configuration Registers

Offset 43-40 –PCI HCI Control ......................................RO

insert bit definitions here

Offset 44 – Miscellaneous Control ................................. RW

7-1

Reserved

...................................... always reads 0

Lock GUID Registers

Global Unique ID Registers are RW..... default

Global Unique ID Registers are Read Only

Once set, this bit cannot be cleared except by PCI

Reset. The GUID registers are located in memory in

the 1394 register space.

Offset 46 – PHY Control ................................................RW

7-2

Reserved

......................................always reads 0

Isolated

Direct Environment

Isolated Environment

Multiple Speed Concatenation Disable

Packets

different

speeds

may

concatenated as long as the concatenation is

not down to an S100 PHY.

Only same speed packets may be concatenated

(packets of different speeds may not be)

Note:

A default value of 0000 for bits 3-0 indicates that the

1394 interface is connected to a 1394a-compliant

PHY.

Offset F4 – Hide Function Control ................................RW

7-1

Reserved

......................................always reads 0

Hide Function

1394 Function Visible ..........................default

1394 Function Hidden

If this bit is set, the 1394 function will be

hidden. All subsequent reads or writes to this

configuration space will then cause a master

abort to be generated. This bit can only be

cleared by a PCI reset.

Offset FB-F8 – Manufacturer ID ................................... RO

31-0 Manufacturer ID............................always reads ???

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