EPC901 datasheet(19/37 Pages) EPC

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10.3. I2C register description

Address Register name

Ref.

Description

Configuration

0x00

ACQ_TX_CONF_I2C

Table 6 Acquisition and transmission configuration

Use this register to overwrite the values set by the corresponding configuration

pins (see Table 2 or Table 3). Make sure RD_CONF_CTRL is set to 1. In this case

ACQ_TX_CONF_I2C is copied to ACQ_TX_CONF_EFF at the rising edge of

Read Pulse.

0x01

BW_VIDEO_CONF_IC2

Table 7 Bandwidth control of the video amplifier

Use this register address to overwrite the values set by the corresponding configu-

ration pins (see Table 2 or Table 3). Make sure RD_CONF_CTRL is set to 1. In

this case BW_VIDEO_CONF_IC2 is copied to BW_VIDEO_CONF_EFF at the ris-

ing edge of Read Pulse.

0x02

MISC_CONF

Table 8 Miscellaneous configuration

0x03

ACQ_TX_CONF_EFF

Table 6 Acquisition and transmission configuration (effective register)

The values for this register are read in from the configuration pins as long as

RD_CONF_CTRL is set to 0

Do not write to this register through I2C, use ACQ_TX_CONF_I2C instead.

0x04

BW_VIDEO_CONF_EFF

Table 7 Bandwidth control of the video amplifier (effective register)

The values for this register are read in from the configuration pins as long as

RD_CONF_CTRL is set to 0

Do not write to this register through I2C, use BW_VIDEO_CONF_IC2 instead.

Trimming

0x90

OSC_TRIM_REG

Table 11 Oscillator trimming

0x91 …

0x93

reserved

n/a

0x94

VIDEO_GBW_SEL_REG

Table 13 Tuning of the gain-bandwidth product of video amp

Temperature sensors

0xA0

TEMP_SENS_L_LSB

Table 15 Least-significant byte of left sensor's raw temperature value

0xA1

TEMP_SENS_L_MSB

Table 16 Most-significant byte of left sensor's raw temperature value

0xA2

TEMP_SENS_R_LSB

Table 17 Least-significant byte of right sensor's raw temperature value

0xA3

TEMP_SENS_R_MSB

Table 18 Most-significant byte of right sensor's raw temperature value

0xA4

TEMP_SENS_CONF

Table 19 Configure behavior of temperature sensor

Error indicators (read-only)

0xB0

I2C_ERROR_IND

Table 22 Error indicator of the I2C interface

Analog test mode registers (see also section 15.)

0xD0

ANA_TEST_MODE_EN_0

n/a

Enable register for analog test mode

0xD1

ANA_TEST_MODE_EN_1

n/a

Enable register for analog test mode

0xD2

ANA_TEST_CTRL

n/a

Test mode control register

0xD3

ANA_TEST_CONF

n/a

Configuration for the analog test modes

0xD4

ANA_TEST_MUX_0_SEL

n/a

Selection register for MUX on pin ANA_TEST_0

0xD5

ANA_TEST_MUX_1_SEL

n/a

Selection register for MUX on pin ANA_TEST_1

0xD6

FORCE_ANA_CTRL_SIGS

Table 23 Force power-down of charge pump and pixel bias voltage regulator

0xD7

OSC_TRIM_RANGE_REG

Table 10 Oscillator trimming - set oscillator trim range (available from chip revision number

0x14 i.e. epc901_020)

Debug read-only registers

0xF0 …

0xFE

reserved

n/a

0xFF

CHIP_REV_NO_REG

Table 25 Identifier register for chip revision number

Table 5: Register map accessible by the I2C interface

In the tables below, the operations defined are:

Read

Write

Writeable with protection

Automatic synchronous clear operation after read access

Characteristics subject to change without notice

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