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CS43130 Datasheet(PDF) 111 Page - Cirrus Logic

Part # CS43130
Description  130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver
PDF  137 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43130 Datasheet(HTML) 111 Page - Cirrus Logic

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DS1073F1
111
CS43130
7.5 Headphone and PCM Registers
3
PCM_AMUTE PCM auto mute.
0 Function disabled
1 (Default) Mute occurs after reception of 8,192 consecutive audio samples of static 0 or –1. A single sample of
non-static data releases the mute. Detection and muting is done independently for each channel.
2PCM_
AMUTEBEQA
Auto mute channel B equals channel A.
0 (Default) Function disabled.
1 Only mute when both channels AMUTE conditions are detected.
1
PCM_
MUTE_
A
Channel A mute.
0 (Default) Function is disabled.
1 Channel output is muted. Muting function is affected by the PCM_SZC bits.
0
PCM_
MUTE_
B
Channel A mute.
0 (Default) Function is disabled.
1 Channel output is muted. Muting function is affected by the PCM_SZC bits.
7.5.6
PCM Path Signal Control 2
Address 0x90004
R/W
76543210
—
PCM_INV_A
PCM_INV_B
PCM_SWAP_
CHAN
PCM_COPY_
CHAN
Default
00000000
Bits
Name
Description
7:4
—
Reserved
3
PCM_INV_A Channel A signal invert.
0 (Default) Function is disabled
1 Signal polarity of channel A is inverted
2
PCM_INV_B Channel B signal invert.
0 (Default) the function is disabled
1 Signal polarity of channel B is inverted
1PCM_SWAP_
CHAN
Swap channels A and B at the input. This bit takes effect before PCM_COPY_CHAN.
0 (Default) Function disabled
1 Enable channel A and B swapping
0PCM_COPY_
CHAN
Copy channel A to channel B. This bit takes effect after PCM_SWAP_CHAN.
0 (Default) Function disabled
1 Enable copy A to B function
7.5.7
Class H Control
Address 0xB0000
R/W
76543210
—
ADPT_PWR
HV_EN
EXT_VCPFILT
Default
00011110
Bits
Name
Description
7:5
—
Reserved
4:2
ADPT_PWR Adaptive power adjustment. Configures how power to HP amplifiers adapts to the output signal level.
000 Reserved
001 Fixed, Mode 0 (±VP_LDO)
010 Fixed, Mode 1 (±VCP)
011–110 Reserved
111 (Default) Adapt to signal. The output signal dynamically determines the voltage level.
1
HV_EN
High voltage mode enable.
0 Function disabled (VP_LDO = 2.6V)
1 (Default) Function enabled (VP_LDO = 3.0 V). This requires VP min to be 3.3 V. Also, this mode only applies to
load 600
 and above.
0
EXT_VCPFILT External VCP_FILT± voltage mode.
0 (Default) Function disabled
1 When enabled, VCP_FILT± voltages can be provided externally at ±3.0 V. See power sequencing/timing
requirement in related functional description.
Bits
Name
Description



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