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CS43130 Datasheet(PDF) 109 Page - Cirrus Logic |
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CS43130 Datasheet(HTML) 109 Page - Cirrus Logic |
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109 / 137 page ![]() DS1073F1 109 CS43130 7.5 Headphone and PCM Registers 7.5 Headphone and PCM Registers 5— Reserved 4SIGCTL_ DSDEQPCM Enable DSD signal path control register bits to be controlled by PCM setting. DSD setting is ignored. Register bits affected are the following: DSD_VOL_BEQA, DSD_SZC, DSD_AMUTE, DSD_AMUTE_BEQA, DSD_MUTE_A, DSD_MUTE_B, DSD_INV_A, DSD_INV_B, DSD_SWAP_CHAN, DSD_COPY_CHAN After set, each DSD_x register bit is equal to setting of PCM_x register bit. 0 (Default) Function is disabled 1 Function is enabled 3 DSD_INV_A DSD Processor Channel A signal invert. 0 (Default) Function is disabled 1 Signal polarity of channel A is inverted 2 DSD_INV_B DSD Processor Channel B signal invert 0 (Default) the function is disabled 1 Signal polarity of channel B is inverted 1 DSD_SWAP_ CHAN Swap channels A and B at the input. This bit takes effect before DSD_COPY_CHAN and DSD_INV_x. 0 (Default) Function disabled 1 Enable channel A and B swapping 0DSD_COPY_ CHAN Copy channel A to channel B. This bit takes effect after DSD_SWAP_CHAN, but before DSD_INV_x. 0 (Default) Function disabled 1 Enable copy A to B function 7.5.1 HP Output Control 1 Address 0x80000 R/W 76543210 HP_CLAMPA HP_CLAMPB OUT_FS HP_IN_EN — Default 00110000 Bits Name Description 7 HP_CLAMPA Opt-out on clamping HPOUTA output to ground when PDN_HP is enabled. 0 (Default) Function disabled. HPOUTA is clamped when PDN_HP is set and HP_IN_EN is cleared. HPOUT is not clamped when PDN_HP is cleared. 1 HPOUTA clamp is released if and only if PDN_HP is set. 6 HP_CLAMPB Opt-out on clamping HPOUTB output to ground when PDN_HP is enabled. 0 (Default) Function disabled. HPOUTB is clamped when PDN_HP is set and HP_IN_EN is cleared. HPOUT is not clamped when PDN_HP is cleared. 1 HPOUTB clamp is released if and only if PDN_HP is set. 5:4 OUT_FS Output full scale setting. This setting must only be updated when PDN_HP is set. 00 0.5 V 01 1 V 10 1.41 V 11 (Default) 1.73 V 3 HP_IN_EN HPIN switches enable. 0 (Default) Switch open 1 Switch closed 2:0 — Reserved 7.5.2 PCM Filter Option Address 0x90000 R/W 76543210 FILTER_ SLOW_FASTB PHCOMP_ LOWLATB NOS — HIGH_PASS DEEMP_ON Default 00000010 Bits Name Description 7FILTER_ SLOW_ FASTB Fast and slow filter selection. 0 (Default) Fast filter is selected. 1 Slow filter is selected. Bits Name Description |
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