WM8255 datasheet(10/49 Pages) CIRRUS

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Production Data

WM8255

PD, Rev 4.7, August 2013

INPUT VIDEO SAMPLING

Figure 1 Input Video Timing

Note:

See Page 35 (Programmable VSMP Detect Circuit) for video sampling description.

Test Conditions

AVDD1 = 5.75V, DVDD = 3.3V, AGND = DGND = AVDD2 = 0V, TA = 25C, MCLK = 24MHz unless otherwise stated.

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

MCLK period

tPER

41.5

MCLK high period

tMCLKH

MCLK low period

tMCLKL

VSMP period

tVPER

VSMP set-up time

tVSMPSU

VSMP hold time

tVSMPH

Video level set-up time

tVSU

Video level hold time

tVH

Reset level set-up time

tRSU

Reset level hold time

tRH

Notes:

tVSU and tRSU denote the set-up time required after the input video signal has settled.

Parameters are measured at 50% of the rising/falling edge.

OUTPUT DATA TIMING

MCLK

OP[3:0]

Figure 2 Output Data Timing

Test Conditions

AVDD1 = 5.75V, DVDD = 3.3V, AGND = DGND = AVDD2 = 0V, TA = 25C, MCLK = 24MHz unless otherwise stated.

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Output propagation delay

tPD

IOH = 1mA, IOL = 1mA

MCLK

VSMP

INPUT

VIDEO

PER

VSMPSU

VSMPH

VSU

RSU

MCLKL

MCLKH

VPER

RSU

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