AD4011 datasheet(35/38 Pages) AD

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Data Sheet

AD4003/AD4007/AD4011

Rev. B | Page 35 of 38

DAISY-CHAIN MODE

Use this mode to daisy-chain multiple AD4003/AD4007/AD4011

devices on a 3-wire or 4-wire serial interface. This feature is useful

for reducing component count and wiring connections, for

example, in isolated multiconverter applications or for systems

with a limited interfacing capacity. Data readback is analogous

to clocking a shift register.

A connection diagram example using two AD4003/AD4007/

AD4011 devices is shown in Figure 65, and the corresponding

timing diagram is shown in Figure 66.

When SDI and CNV are low, SDO is driven low. With SCK low,

a rising edge on CNV initiates a conversion, selects daisy-chain

mode, and disables the busy indicator. In this mode, CNV is

held high during the conversion phase and the subsequent data

readback. When the conversion is complete, the MSB is output

onto SDO and the AD4003/AD4007/AD4011 enter the

acquisition phase and power down. The remaining data bits

stored in the internal shift register are clocked out of SDO by

subsequent SCK falling edges. For each ADC, SDI feeds the

input of the internal shift register and is clocked by the SCK

rising edges. Each ADC in the daisy-chain outputs its data MSB

first, and 18 × N clocks are required to read back the N ADCs.

The data is valid on both SCK edges. The maximum conversion

rate is reduced because of the total readback time.

It is possible to write to each ADC register in daisy-chain mode.

The timing diagram is shown in Figure 51. This mode requires

4-wire operation because data is clocked in on the SDI line with

CNV held low. The same command byte and register data can

be shifted through the entire chain to program all ADCs in the

chain with the same register contents, which requires 8 × (N + 1)

clocks for N ADCs. It is possible to write different register contents

to each ADC in the chain by writing to the furthest ADC in the

chain, first using 8 × (N + 1) clocks, and then the second furthest

ADC with 8 × N clocks, and so forth until reaching the nearest

ADC in the chain, which requires 16 clocks for the command

and register data. It is not possible to read register contents in

daisy-chain mode; however, the six status bits can be enabled if

the user wants to determine the ADC configuration. Note that

enabling the status bits requires six extra clocks to clock out the

ADC result and the status bits per ADC in the chain. Turbo

mode cannot be used in daisy-chain mode.

CONVERT

DATA IN

CLK

DIGITAL HOST

DEVICE B

DEVICE A

SDI

SDO

CNV

SCK

SDI

SDO

CNV

SCK

AD4003/AD4007/

AD4011

AD4003/AD4007/

AD4011

Figure 65. Daisy-Chain Mode Connection Diagram

SDOA = SDIB

DA17

DB17

DB16

DB15

DA16

DA15

DA1DA0

DB1DB0

SCK

343536

tSSDISCK

tHSDISCK

CONVERSION

ACQUISITION

tCONV

tCYC

tACQ

ACQUISITION

CNV

tSCK

tSCKL

tSCKH

SDIA = 0

SDOB

DA17

DA16

tHSDO

tDSDO

tQUIET2

tHSCKCNV

tDIS

tQUIET2

tEN

Figure 66. Daisy-Chain Mode Serial Interface Timing Diagram

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