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AD9628

Data Sheet

Rev. C | Page 14 of 42

Pin No.

Mnemonic

Type

Description

Digital Outputs

D0A (LSB)

Output

Channel A CMOS Output Data.

D1A

Output

Channel A CMOS Output Data.

D2A

Output

Channel A CMOS Output Data.

D3A

Output

Channel A CMOS Output Data.

D4A

Output

Channel A CMOS Output Data.

D5A

Output

Channel A CMOS Output Data.

D6A

Output

Channel A CMOS Output Data.

D7A

Output

Channel A CMOS Output Data.

D8A

Output

Channel A CMOS Output Data.

D9A

Output

Channel A CMOS Output Data.

D10A

Output

Channel A CMOS Output Data.

D11A (MSB)

Output

Channel A CMOS Output Data.

ORA

Output

Channel A Overrange Output.

D0B (LSB)

Output

Channel B CMOS Output Data.

D1B

Output

Channel B CMOS Output Data.

D2B

Output

Channel B CMOS Output Data.

D3B

Output

Channel B CMOS Output Data.

D4B

Output

Channel B CMOS Output Data.

D5B

Output

Channel B CMOS Output Data.

D6B

Output

Channel B CMOS Output Data.

D7B

Output

Channel B CMOS Output Data.

D8B

Output

Channel B CMOS Output Data.

D9B

Output

Channel B CMOS Output Data.

D10B

Output

Channel B CMOS Output Data.

D11B (MSB)

Output

Channel B CMOS Output Data.

ORB

Output

Channel B Overrange Output

DCOA

Output

Channel A Data Clock Output.

DCOB

Output

Channel B Data Clock Output.

SPI Control

SCLK/DFS

Input

SPI Serial Clock/Data Format Select Pin in External Pin Mode.

SDIO/DCS

Input/Output

SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.

CSB

Input

SPI Chip Select (Active Low).

ADC Configuration

OEB

Input

Output Enable Input (Active Low).

PDWN

Input

Power-Down Input in External Pin Mode. In SPI mode, this input can be configured

as power-down or standby.

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