AD9628 datasheet(28/43 Pages) AD

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Data Sheet

AD9628

Rev. C | Page 27 of 42

In any configuration, the value of Shunt Capacitor C is dependent

on the input frequency and source impedance and may need to

be reduced or removed. Table 11 displays the suggested values to

set the RC network. However, these values are dependent on the

input signal and should be used only as a starting guide.

Table 11. Example RC Network

Frequency Range (MHz)

R Series

(Ω Each)

C Differential (pF)

0 to 70

70 to 200

125

Open

It is not recommended to drive the AD9628 inputs single-ended.

VOLTAGE REFERENCE

A stable and accurate 1.0 V voltage reference is built into the

AD9628. The VREF can be configured using either the internal

1.0 V reference or an externally applied 1.0 V reference voltage.

The various reference modes are summarized in the sections that

follow. The Reference Decoupling section describes the best

practices PCB layout of the reference.

Internal Reference Connection

A comparator within the AD9628 detects the potential at the

SENSE pin and configures the reference into two possible

modes, which are summarized in Table 12. If SENSE is grounded,

the reference amplifier switch is connected to the internal resistor

divider (see Figure 48), setting VREF to 1.0 V.

VREF

SENSE

0.5V

ADC

SELECT

LOGIC

0.1µF

1.0µF

VIN–A/VIN–B

VIN+A/VIN+B

ADC

CORE

Figure 48. Internal Reference Configuration

If the internal reference of the AD9628 is used to drive multiple

converters to improve gain matching, the loading of the reference

by the other converters must be considered. Figure 49 shows

how the internal reference voltage is affected by loading.

–3.0

02.0

LOAD CURRENT (mA)

–0.5

–1.0

–1.5

–2.0

–2.5

0.2

0.4

0.6

0.8

1.0

1.4

1.6

1.8

1.2

INTERNAL VREF =1.00V

Figure 49. VREF Accuracy vs. Load Current

Table 12. Reference Configuration Summary

Selected Mode

SENSE Voltage (V)

Resulting VREF (V)

Resulting Differential Span (V p-p)

Fixed Internal Reference

AGND to 0.2

1.0 internal

2.0

Fixed External Reference

AVDD

1.0 applied to external VREF pin

2.0

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