AD9628 datasheet(17/43 Pages) AD

17 / 43 page

AD9628

Data Sheet

Rev. C | Page 16 of 42

Pin No.

Mnemonic

Type

Description

Digital Outputs

D0+ (LSB)

Output

Channel A/Channel B LVDS Output Data 0—True.

D0− (LSB)

Output

Channel A/Channel B LVDS Output Data 0—Complement.

D1+

Output

Channel A/Channel B LVDS Output Data 1—True.

D1−

Output

Channel A/Channel B LVDS Output Data 1—Complement.

D2+

Output

Channel A/Channel B LVDS Output Data 2 —True.

D2−

Output

Channel A/Channel B LVDS Output Data 2—Complement.

D3+

Output

Channel A/Channel B LVDS Output Data 3—True.

D3−

Output

Channel A/Channel B LVDS Output Data 3—Complement.

D4+

Output

Channel A/Channel B LVDS Output Data 4—True.

D4−

Output

Channel A/Channel B LVDS Output Data 4—Complement.

D5+

Output

Channel A/Channel B LVDS Output Data 5—True.

D5−

Output

Channel A/Channel B LVDS Output Data 5—Complement.

D6+

Output

Channel A/Channel B LVDS Output Data 6—True.

D6−

Output

Channel A/Channel B LVDS Output Data 6—Complement.

D7+

Output

Channel A/Channel B LVDS Output Data 7—True.

D7−

Output

Channel A/Channel B LVDS Output Data 7—Complement.

D8+

Output

Channel A/Channel B LVDS Output Data 8—True.

D8−

Output

Channel A/Channel B LVDS Output Data 8—Complement.

D9+

Output

Channel A/Channel B LVDS Output Data 9—True.

D9−

Output

Channel A/Channel B LVDS Output Data 9—Complement.

D10+

Output

Channel A/Channel B LVDS Output Data 10—True.

D10−

Output

Channel A/Channel B LVDS Output Data 10—Complement.

D11+ (MSB)

Output

Channel A/Channel B LVDS Output Data 11—True.

D11− (MSB)

Output

Channel A/Channel B LVDS Output Data 11—Complement.

OR+

Output

Channel A/Channel B LVDS Overrange Output—True.

OR−

Output

Channel A/Channel B LVDS Overrange Output—Complement.

DCO+

Output

Channel A/Channel B LVDS Data Clock Output—True.

DCO−

Output

Channel A/Channel B LVDS Data Clock Output—Complement.

SPI Control

SCLK/DFS

Input

SPI Serial Clock/Data Format Select Pin in External Pin Mode.

SDIO/DCS

Input/Output

SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.

CSB

Input

SPI Chip Select (Active Low).

ADC Configuration

OEB

Input

Output Enable Input (Active Low).

PDWN

Input

Power-Down Input in External Pin Mode. In SPI mode, this input can be configured as

power-down or standby.

AD9628 Datasheet(PDF) 17 Page - Analog Devices

AD9628 Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

Datasheet Download

Link URL