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AD9212

Data Sheet

Rev. E | Page 12 of 56

Pin No.

Mnemonic

Description

D + B

ADC B Digital Output True

D − A

ADC A Digital Output Complement

D + A

ADC A Digital Output True

SCLK/DTP

Serial Clock/Digital Test Pattern

SDIO/ODM

Serial Data Input-Output/Output Driver Mode

CSB

Chip Select Bar

PDWN

Power-Down

VIN + A

ADC A Analog Input True

VIN − A

ADC A Analog Input Complement

VIN − B

ADC B Analog Input Complement

VIN + B

ADC B Analog Input True

VIN + C

ADC C Analog Input True

VIN − C

ADC C Analog Input Complement

VIN − D

ADC D Analog Input Complement

VIN + D

ADC D Analog Input True

RBIAS

External Resistor to Set the Internal ADC Core Bias Current

SENSE

Reference Mode Selection

VREF

Voltage Reference Input/Output

REFB

Negative Differential Reference

REFT

Positive Differential Reference

VIN + E

ADC E Analog Input True

VIN − E

ADC E Analog Input Complement

VIN − F

ADC F Analog Input Complement

VIN + F

ADC F Analog Input True

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