SLG46170 datasheet(57/87 Pages) DIALOG

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000-0046170-103

Page 56 of 86

SLG46170

12.5 CNT/DLY3 Register Settings

12.6 CNT/DLY4 Register Settings

Table 50. CNT/DLY3 Register Settings

Signal Function

Address

Counter/Delay1

Mode Select

reg<768>

0: Delay Mode

1: Counter Mode

Counter/Delay1

Clock Source select

reg<771:769>

000: Internal OSC Clock

001: OSC/4

010: OSC/12

011: OSC/24

100: OSC/64

101: External Clock

110: Reserved

111: Counter 2 Overflow

Counter1 Control

Data/Delay1 Time

Control

reg<779:772>

1-256: (delay time = (counter control data +2) /freq)

Delay1 Mode Select

or asynchronous

counter reset

reg<781:780>

00: Delay on both falling and rising edges (for delay & counter reset)

01: Delay on falling edge only (for delay & counter reset)

10: Delay on rising edge only (for delay & counter reset)

11: No delay on either falling or rising edges / high level reset for counter mode

Table 51. CNT/DLY4 Register Settings

Signal Function

Address

Counter/Delay4

Mode Select

reg<782>

0: Delay Mode

1: Counter Mode

Counter/Delay4

Clock Source Select

(external clock is

only for counter

mode)

reg<785:783>

000: Internal OSC Clock

001: OSC/4

010: OSC/12

011: OSC/24

100: OSC/64

101: External Clock

110: Reserved

111: Counter 3 Overflow

Counter4 Control

Data/Delay4 Time

Control

reg<793:786>

1-256: (delay time = (counter control data +2) /freq)

Delay4 Mode Select

reg<795:794>

00: Delay on both falling and rising edges

01: Delay on falling edge only

10: Delay on rising edge only

11: No delay on either falling or rising edges

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