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SLG46170 Datasheet(PDF) 80 Page - Dialog Semiconductor

Part # SLG46170
Description  Personal Computers and Servers
PDF  87 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

SLG46170 Datasheet(HTML) 80 Page - Dialog Semiconductor

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000-0046170-103
Page 79 of 86
SLG46170
<954>
PIN12 driver strength selection
0: 1X
1: 2X
<957:955>
PIN13 mode control
000: Digital Input without Schmitt Trigger
001: Digital Input with Schmitt Trigger
010: Low Voltage Digital Input
011: Reserved
100: Push Pull
101: Open Drain NMOS
110: Open Drain PMOS
111: Reserved
<959:558>
PIN13 pull up/down resistor value selection
00: floating
01: 10 K
10: 100 K
11: 1 M
<960>
PIN13 pull up/down resistor select
0: pull down resistor enable
1: pull up resistor enable
<961>
PIN13 driver strength selection
0: 1X
1: 2X
<964:962>
PIN14 mode control
000: Digital Input without Schmitt Trigger
001: Digital Input with Schmitt Trigger
010: Low Voltage Digital Input
011: Reserved
100: Push Pull
101: Open Drain NMOS
110: Open Drain PMOS
111: Reserved
<966:965>
PIN14 pull up/down resistor value selection
00: floating
01: 10 K
10: 100 K
11: 1 M
<967>
PIN14 pull up/down resistor select
0: pull down resistor enable
1: pull up resistor enable
<968>
PIN14 driver strength selection
0: 1X
1: 2X
reg<969>
Force RC oscillator on
0: Auto Power on
1: Force Power on
reg<970>
RC Oscillator frequency control
0: 25 K
1: 2 M
reg<971>
Reserved
reg<973:972> Internal Oscillator frequency divider control
00: OSC/8
01: OSC/12
10: OSC/24
11: OSC/64
reg<974>
External Clock Source Select
0: Internal Oscillator
1: External Clock from Pin20
reg<976:975> Osc clock pre-divider
00: Div1
01: Div2
10: Div4
11: Div8
reg<977>
LUT3_8 or pipe delay output select
0: Lut3_8
1: 1 pipe delay output
reg<978>
Pipe delay OUT1 polarity select bit
0: non-inverted
1: inverted
Register Bit
Address
Signal Function
Register Bit Definition



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