| Electronic Components Datasheet Search |
|
SLG46170 Datasheet(PDF) 27 Page - Dialog Semiconductor |
|
|
|||||||||||||||||||||||||||||
SLG46170 Datasheet(HTML) 27 Page - Dialog Semiconductor |
|
27 / 87 page ![]() 000-0046170-103 Page 26 of 86 SLG46170 7.6 Register OE IO Structure 7.6.1 Register OE IO Structure (for Pins 3, 4, 5, 6, 7, 10, 11, 12, 13, 14) Figure 3. Register OE IO Structure Diagram PAD Digital In S0 S1 pull_up_en 10 k 90 k 900 k Res_sel[1:0] 00: floating 01: 10 k 10: 100 k 11: 1 M wosmt_en smt_en lv_en Low Voltage Input Schmitt Trigger Input Non-Schmitt Trigger Input Mode [2:0] 000: Digital In without Schmitt Trigger, wosmt_en=1, OE = 0 001: Digital In with Schmitt Trigger, smt_en=1, OE = 0 010: Low Voltage Digital In mode, lv_en = 1, OE = 0 011: Reserved 100: push-pull mode, pp_en=1, OE = 1 101: NMOS open drain mode, odn_en=1, OE = 1 110: PMOS open drain mode, odp_en=1, OE = 1 111: Reserved Digital Out Digital Out OE odn_en OE odn_en Digital Out OE 2x_en pp_en 2x_en odp_en Digital Out OE pp_en 2x_en odp_en |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |