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SLG46170 Datasheet(PDF) 65 Page - Dialog Semiconductor |
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SLG46170 Datasheet(HTML) 65 Page - Dialog Semiconductor |
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65 / 87 page ![]() 000-0046170-103 Page 64 of 86 SLG46170 16.0 RC Oscillator (RC Osc) 16.1 RC Oscillator Overview The SLG46170 has two internal RC oscillators, one that runs at 25 kHz and one that runs at 2 MHz. The user can select one of these fundamental frequencies for the RC OSC Macrocell, or the fundamental frequency can also come from an external clock input (PIN 14). There are two divider stages that allow the user flexibility for introducing clock signals on various Connection Matrix Input lines. The first stage divider allows the selection of /1, /2, /4 or /8 divide down frequency from the fundamental. The second stage divider has an input of one frequency from the first stage divider, and outputs five different frequencies on Connection Matrix Input lines <45>, <46>, <47>, <48>, and <49>. See Figure 33 below for details of the frequencies for each of these five Connection Matrix Inputs. If PWR DOWN input of oscillator is LOW, the oscillator will be turned on. If PWR DOWN input of oscillator is HIGH the oscillator will be turned off. The PWR DOWN signal has the highest priority. The user can select two OSC POWER MODEs (reg<707>): •If AUTO POWER ON <0> is selected, the OSC will run when the SLG46170 is powered on. •If FORCE POWER ON <1> is selected, the OSC will run only when any macrocell that uses OSC is powered on. OSC can be turned on by: • Register control (force power on) • Delay mode, when delay requires OSC •CNT |
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