CYUSB3314 datasheet(13/43 Pages) CYPRESS

13 / 43 page

CYUSB330x/CYUSB331x

CYUSB332x/CYUSB230x

Document Number: 001-73643 Rev. *R

Page 13 of 43

RESERVED1

I/O

This pin must be pulled HIGH using a 10 k

 to VDD_IO.

RESERVED2

This pin must be pulled HIGH using a 10 k

 to VDD_IO.

Mode Select, Clock, and Reset

MODE_SEL[0]

Device operation mode select bit 0; refer to Table 5 on page 24

MODE_SEL[1]

Device operation mode select bit 1; refer to Table 5 on page 24

XTL_OUT

Crystal out

XTL_IN

Crystal in

RESETN

Active LOW reset input

I2C_CLK

I/O

I2C clock

I2C_DATA

I/O

I2C data

SUSPEND

I/O

Hub suspend status indicator. This pin is asserted if both the

SS and USB 2.0 hubs are in the suspend state and is

de-asserted when either of the hubs comes out of the suspend

state.

Power and Ground

VDD_EFUSE

PWR

1.2 V normal operation, 2.5 V for programming. Customers

should connect to 1.2 V.

AVDD12

PWR 10, 16, 34, 46,

52, 53

A10, C9, F9,

H1, H10, J2

1.2 V analog supply

GND

PWR

B5, C6, D5, D7,

D9, E9, F2, G9,

H6, J1, J3, J9

GND pin

DVDD12

PWR 1, 3, 7, 13, 27,

37, 43, 49,

B10, D4, D6,

D8, E1, E10,

F5, K3, K9

1.2 V core supply

VBUS _US

PWR

This pin must be connected to VBUS from US port

VBUS_DS

PWR

This pin is used to power the Apple-charging circuit in HX3.

For BC v1.2 compliance testing, connect pin to GND. For

normal operation, connect pin to local 5 V supply.

AVDD33

PWR

4, 56, 61, 66 A4, A7, B6, F3 3.3 V analog supply

VDD_IO

PWR

B4, E7, G6

3.3 V I/O supply

USB Precision Resistors

RREF_USB2

Connect pin to a precision resistor (6.04 k

±1%) to generate

a current reference for USB 2.0 PHY.

RREF_SS

Connect pin to a precision resistor (200

 ±1%) for SS PHY

termination impedance calibration.

Table 2. 68-Pin QFN, 100-Ball BGA Pinout for CYUSB3302 and CYUSB3304 (continued)

Pin Name

Type 68-QFN Pin#

100-BGA

Ball #

Description

CYUSB3302 CYUSB3304

Note

4. These pins are Do Not Use (DNU); they must be left floating.

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