CYUSB3314 datasheet(22/43 Pages) CYPRESS

22 / 43 page

CYUSB330x/CYUSB331x

CYUSB332x/CYUSB230x

Document Number: 001-73643 Rev. *R

Page 22 of 43

DS3_GREEN[9]

I/O

CYUSB3312/3314/3324: LED_GREEN output for DS3 port

DS3_VBUSEN_SL[9]

CYUSB3328: VBUS power enable output for SS port 3

VID_SEL[1][10]

This pin is called VID_SEL[1] in the pin-strap configuration mode. For

pin-strap configuration details, refer to Table 6 on page 25.

DS3_LED_SS[9]

I/O

LED_SS output for DS3 port

PIN_STRAP[10]

This pin is called PIN_STRAP in pin-strap configuration mode. When

connected to VDD_IO through a 10-k

 resistor, this pin enables

pin-strap configuration mode for HX3.

DS4 Port

DS4_RXP

SuperSpeed receive plus

DS4_RXM

SuperSpeed receive minus

DS4_TXP

SuperSpeed transmit plus

DS4_TXM

SuperSpeed transmit minus

DS4_DP

I/O

USB 2.0 data plus

DS4_DM

I/O

USB 2.0 data minus

DS4_OVRCURR

CYUSB3314/3324/3326/3328: Overcurrent detect input for DS4 port.

CYUSB3312: This pin must be pulled HIGH using a 10 k

 to VDD_IO.

DS4_PWREN/PWR_EN4

I/O

VBUS power enable output for DS4 port. This pin is also used as power

enable output when configured in ganged power mode using the Blaster

Plus tool. When the port is disabled, this pin is in tristate.

DS4_CDP_EN[10]

This pin is called DS4_CDP_EN in the pin-strap configuration mode.

DS4_AMBER[9]

I/O

LED_AMBER output for DS4 port

I2C_DEV_ID[10]

This pin is called I2C_DEV_ID in the pin-strap configuration mode.

DS4_GREEN[9]

I/O

CYUSB3312/3314/3324: LED_GREEN output for DS4 port

DS4_VBUSEN_SL

CYUSB3328: VBUS power enable output for SS port 4

VID_SEL[0][10]

This pin is called VID_SEL[0] in the pin-strap configuration mode.

DS4_LED_SS

I/O

LED_SS output for DS4 port. The LED must be connected to GND as

shown in Figure 16 on page 25. If LED is not used, this pin must be pulled

HIGH using a 10 k

 to VDD_IO.

RESERVED1

This pin must be pulled HIGH using a 10 k

 to VDD_IO.

Mode Select, Clock, and Reset

MODE_SEL[0]

Device operation mode select bit 0; refer to Table 5 on page 24

MODE_SEL[1]

Device operation mode select bit 1; refer to Table 5 on page 24

XTL_OUT

Crystal out

XTL_IN

Crystal in

RESETN

Active LOW reset input

I2C_CLK

I/O

I2C clock

I2C_DATA

I/O

I2C data

Table 4. 88-Pin QFN, 100-Ball BGA Pinout for CYUSB331X and CYUSB332X (continued)

Pin Name

Type

Pin#

Ball#

Description

CYUSB3312

CYUSB3314

CYUSB3324

CYUSB3326

CYUSB3328

Notes

9. This pin can be configured as a GPIO using custom firmware. For information contact www.cypress.com/support.

10. For pin-strap configuration details, refer to Table 6 on page 25.

CYUSB3314 Datasheet(PDF) 22 Page - Cypress Semiconductor

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