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CYUSB3314 Datasheet(PDF) 25 Page - Cypress Semiconductor

Part # CYUSB3314
Description  HX3 USB 3.0 Hub
PDF  43 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYUSB3314 Datasheet(HTML) 25 Page - Cypress Semiconductor

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CYUSB330x/CYUSB331x
CYUSB332x/CYUSB230x
Document Number: 001-73643 Rev. *R
Page 25 of 43
Temperature range of 25 °C–70 °C and programming voltage of
2.5 V–2.7 V.
Pin-Strap Configuration
Pin-straps are supported for select product options (see Table 1
on page 5) to provide reconfigurability without an additional
EEPROM. The pin-strap configuration is enabled by pulling the
Pin #63 of 88-pin QFN HIGH. Table 6 on page 25 shows the
configuration options supported through pin-straps and the
GPIOs used for this purpose. Figure 16 and Figure 17 show how
the GPIOs need to be connected if pin-strap and LED connection
are required or only pin-strap is required.
HX3 samples pin-strap GPIOs at power-up. Floating straps are
considered as invalid and the default configuration is used. If
PIN_STRAP (Pin #63 of 88-pin QFN) is floating, all strap inputs
are considered invalid. A GPIO is considered strapped “1” or “0”
when connected with a weak pull-up (10 k
) or pull-down
(10 k
) respectively. After the initial sampling at power-up and
reset, the GPIOs are used in their normal functions.
Figure 16. Pin-Strap With LED or LED-Only Connection
Figure 17. Pin-Strap Connection
VDD_IO
To GPIO
800  –
1 k
800  –
1 k
VSS
To GPIO
10 k
10 k
Pin-Strap HIGH
with LED
Pin-Strap LOW
with LED
To GPIO
VDD_IO
10 k
10 k
To GPIO
VSS
Pin-Strap HIGH
Pin-Strap LOW
Notes
11. See Figure 16 and Figure 17.
12. I2C_DEV_ID is valid only when HX3 is in I2C slave mode.
13. VID, PORT_DISABLE, NON_REMOVABLE are group straps. If one of the pins in a group strap is floating (INVALID), that group input will be INVALID and the default
will not be overwritten.
14. These DS ports are exposed ports and the connected devices can be removed.
15. DSx_CDP_EN will be active LOW input when PWR_SW_POL is set to active LOW; similarly DSx_CDP_EN will be active HIGH input when PWR_SW_POL is set to
active HIGH.
Table 6. Pin-Strap Configuration
88-QFN
Pin #
Pin-Strap Name
Strapped ‘0’[11]
Strapped ‘1’[11]
30
I2C_DEV_ID[12]
ID 0: HX3 I2C slave address (7 bits) is 0x60.
This is also the default I2C slave address for
the 68-pin QFN package.
ID 1: HX3 I2C slave address (7 bits) is 0x58
31
PWR_SW_POL
Power enable and overcurrent will be active
LOW
Power enable and overcurrent will be active
HIGH
2
ACA_DOCK
Disabled
Enabled
84
PWR_EN_SEL
Individual
Gang
63
PIN_STRAP[13]
No pin-strapping
Pin-strapping configuration enabled
4
PORT_DISABLE[1]
PORT_DISABLE[1:0] =
b’00: DS1, DS2, DS3, DS4 active
b’01: DS1, DS2, DS3 active
b’10: DS1, DS2 active
b’11: DS1 active
Pin-straps cannot enable ports disabled by factory setting.
3
PORT_DISABLE[0]
6
NON_REMOVABLE[1][14] NON_REMOVABLE[1:0] =
b’00: DS1, DS2, DS3, DS4 removable
b’01: DS1, DS2, DS3 removable
b’10: DS1, DS2 removable
b’11: DS1 removable
5
NON_REMOVABLE[0][14]
85
VID[2]
Reserved. If PIN_STRAP is enabled and CY VID is required, strap VID[2:0] to ‘1’.
64
VID[1]
43
VID[0]
38
DS1_CDP_EN[15]
strapped ‘0’
strapped ‘1’
strapped ‘0’
strapped ‘1’
DS1 CDP enabled
DS1 CDP disabled
DS1 CDP disabled
DS1 CDP enabled
86
DS2_CDP_EN[15]
DS2 CDP enabled
DS2 CDP disabled
DS2 CDP disabled
DS2 CDP enabled
87
DS3_CDP_EN[15]
DS3 CDP enabled
DS3 CDP disabled
DS3 CDP disabled
DS3 CDP enabled
35
DS4_CDP_EN[15]
DS4 CDP enabled
DS4 CDP disabled
DS4 CDP disabled
DS4 CDP enabled



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