S71PL254 datasheet(76/196 Pages) SPANSION

76 / 196 page

S29PL127J/S29PL064J/S29PL032J for MCP

S29PL127J_064J_032J_MCP_00_A3 August 12, 2004

Advance

I n f o rmation

RY/BY#: Ready/Busy#

The RY/BY# is a dedicated, open-drain output pin which indicates whether an

Embedded Algorithm is in progress or complete. The RY/BY# status is valid after

the rising edge of the final WE# pulse in the command sequence. Since RY/BY#

is an open-drain output, several RY/BY# pins can be tied together in parallel with

a pull-up resistor to VCC.

If the output is low (Busy), the device is actively erasing or programming. (This

includes programming in the Erase Suspend mode.) If the output is high (Ready),

the device is in the read mode, the standby mode, or one of the banks is in the

erase-suspend-read mode.

Table 19 shows the outputs for RY/BY#.

DQ6: Toggle Bit I

Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm

is in progress or complete, or whether the device has entered the Erase Suspend

mode. Toggle Bit I may be read at any address, and is valid after the rising edge

Notes:

1. VA = Valid address for programming. During a sector erase operation, a valid address is

any sector address within the sector being erased. During chip erase, a valid address is

any non-protected sector address.

2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously

with DQ5.

Figure 6. Data# Polling Algorithm

DQ7 = Data?

Yes

DQ5 = 1?

Yes

FAIL

PASS

Read DQ7–DQ0

Addr = VA

Read DQ7–DQ0

Addr = VA

DQ7 = Data?

START

S71PL254 Datasheet(PDF) 76 Page - SPANSION