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LTC2602 Datasheet(PDF) 26 Page - Linear Technology |
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LTC2602 Datasheet(HTML) 26 Page - Linear Technology |
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26 / 32 page  LTC2320-12 26 Rev B For more information www.analog.com APPLICATIONS INFORMATION Figure 19. CMOS Mode SLEEP and WAKE Using SCK Figure 20. LVDS and CMOS Mode SLEEP and WAKE Using CNV Figure 21. LTC2320-12 Timing Diagram FULL POWER MODE 1 2 3 4 4.096V 4.096V REFOUT RECOVERY REFOUT1 – 4 CNV SCK HOLD STATIC HIGH OR LOW NAP MODE SLEEP MODE SDO1 – 8 WAKE ON 1ST SCK EDGE Z Z Z Z 232012 F19 tWAKE 1 2 3 4 5 4.096V 4.096V REFOUT RECOVERY CNV SCK HOLD STATIC HIGH OR LOW NAP MODE SLEEP MODE FULL POWER MODE WAKE ON 5TH CNV EDGE Z Z Z Z Z 232012 F20 tWAKE REFOUT1 – 4 SDO1 – 8 232012 F21 D15 tSCKL tSCKH tSCK tCNVH tCYC CNV SCK SDO 1 15 16 CLKOUT D14 D2 D13 tCONV tREADOUT D15 D0 D1 tDSCKCLKOUT tDCNVSDOZ tHSDO tDCNVSDOV HI-Z HI-Z tDSCKCNVH DDR MODE TIMING 1 15 16 2 2 3 3 14 14 1 2 3 D15 14 15 16 tSCKL tSCKH tSCK tCNVH tCYC CNV SCK SDO 1 2 3 14 15 16 CLKOUT D14 D2 D13 tCONV tREADOUT D15 D0 D1 tDSCKCLKOUT tDCNVSDOZ tHSDO tDCNVSDOV HI-Z HI-Z tDSCKCNVH SDR MODE TIMING |
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