AM3351 datasheet(211/252 Pages) TI1

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211

AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351

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SPRS717J – OCTOBER 2011 – REVISED APRIL 2016

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Peripheral Information and Timings

Table 7-79. Switching Characteristics for McASP(1)

(see Figure 7-87)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

tc(AHCLKRX)

Cycle time, McASP[x]_AHCLKR and

McASP[x]_AHCLKX

20(2)

tw(AHCLKRX)

Pulse duration, McASP[x]_AHCLKR and

McASP[x]_AHCLKX high or low

0.5P – 2.5(3)

tc(ACLKRX)

Cycle time, McASP[x]_ACLKR and

McASP[x]_ACLKX

tw(ACLKRX)

Pulse duration, McASP[x]_ACLKR and

McASP[x]_ACLKX high or low

0.5P – 2.5(3)

td(ACLKRX-AFSRX)

Delay time, McASP[x]_ACLKR and

McASP[x]_ACLKX transmit edge to

McASP[x]_AFSR and

McASP[x]_AFSX output valid

ACLKR and

ACLKX int

ACLKR and

ACLKX ext in

13.5

Delay time, McASP[x]_ACLKR and

McASP[x]_ACLKX transmit edge to

McASP[x]_AFSR and

McASP[x]_AFSX output valid with

Pad Loopback

ACLKR and

ACLKX ext

out

13.5

td(ACLKX-AXR)

Delay time, McASP[x]_ACLKX

transmit edge to McASP[x]_AXR

output valid

ACLKX int

ACLKX ext in

13.5

Delay time, McASP[x]_ACLKX

transmit edge to McASP[x]_AXR

output valid with Pad Loopback

ACLKX ext

out

13.5

tdis(ACLKX-AXR)

Disable time, McASP[x]_ACLKX

transmit edge to McASP[x]_AXR

output high impedance

ACLKX int

ACLKX ext in

13.5

Disable time, McASP[x]_ACLKX

transmit edge to McASP[x]_AXR

output high impedance with pad

loopback

ACLKX ext

out

13.5

(1) ACLKR internal: ACLKRCTL.CLKRM = 1, PDIR.ACLKR = 1

ACLKR external input: ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0

ACLKR external output: ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1

ACLKX internal: ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1

ACLKX external input: ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0

ACLKX external output: ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1

(2) 50 MHz

(3) P = AHCLKR and AHCLKX period.

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