DLP470TP datasheet(16/48 Pages) TI1

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DLP470TP

DLPS105A – JANUARY 2018 – REVISED MAY 2018

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(1)

See Figure 3 for rise time and fall time for SCP.

(2)

See Figure 5 for timing requirements for LVDS.

(3)

Channel A (Bus A) includes the following LVDS pairs: DCLK_AN and DCLK_AP, SCTRL_AN and SCTRL_AP, D_AN(15:0), and

D_AP(15:0).

(4)

Channel B (Bus B) includes the following LVDS pairs: DCLK_BN and DCLK_BP, SCTRL_BN and SCTRL_BP, D_BN(15:0), and

D_BP(15:0).

(5)

Channel C (Bus C) includes the following LVDS pairs: DCLK_CN and DCLK_CP, SCTRL_CN and SCTRL_CP, D_CN(15:0), and

D_CP(15:0).

(6)

Channel D (Bus D) includes the following LVDS pairs: DCLK_DN and DCLK_DP, SCTRL_DN and SCTRL_DP, D_DN(15:0), and

D_DP(15:0).

6.8 Timing Requirements

MIN

NOM

MAX

UNIT

SCP(1)

Rise slew rate

20% to 80% reference points

V/ns

Fall slew rate

80% to 20% reference points

V/ns

LVDS(2)

Rise slew rate

20% to 80% reference points

0.7

V/ns

Fall slew rate

80% to 20% reference points

0.7

V/ns

Clock cycle

DCLK_A, LVDS pair

2.5

DCLK_B, LVDS pair

2.5

DCLK_C, LVDS pair

2.5

DCLK_D, LVDS pair

2.5

Pulse duration

DCLK_A LVDS pair

1.19

1.25

DCLK_B LVDS pair

1.19

1.25

DCLK_C LVDS pair

1.19

1.25

DCLK_D LVDS pair

1.19

1.25

tSu

Setup time

D_A(15:0) before DCLK_A, LVDS pair

0.275

D_B(15:0) before DCLK_B, LVDS pair

0.275

D_C(15:0) before DCLK_C, LVDS pair

0.275

D_D(15:0) before DCLK_D, LVDS pair

0.275

SCTRL_A before DCLK_A, LVDS pair

0.275

SCTRL_B before DCLK_B, LVDS pair

0.275

SCTRL_C before DCLK_C, LVDS pair

0.275

SCTRL_D before DCLK_D, LVDS pair

0.275

Hold time

D_A(15:0) after DCLK_A, LVDS pair

0.195

D_B(15:0) after DCLK_B, LVDS pair

0.195

D_C(15:0) after DCLK_C, LVDS pair

0.195

D_D(15:0) after DCLK_D, LVDS pair

0.195

SCTRL_A after DCLK_A, LVDS pair

0.195

SCTRL_B after DCLK_B, LVDS pair

0.195

SCTRL_C after DCLK_C, LVDS pair

0.195

SCTRL_D after DCLK_D, LVDS pair

0.195

LVDS(2)

tSKEW

Skew time

Channel B relative to channel A(3)(4), LVDS pair

–1.25

1.25

tSKEW

Skew time

Channel D relative to channel C(5)(6), LVDS pair

–1.25

1.25

DLP470TP Datasheet(PDF) 16 Page - Texas Instruments

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