DLP470TP datasheet(26/48 Pages) TI1

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DLP470TP

DLPS105A – JANUARY 2018 – REVISED MAY 2018

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7.3 Feature Description

7.3.1 Power Interface

The DMD requires 4 DC voltages: 1.8 V source, VOFFSET, VRESET, and VBIAS. In a typical LED-based system, 1.8

V is provided by a TPS54320 and the VOFFSET, VRESET, and VBIAS is managed by the DLPA3005 PMIC and LED

driver.

7.3.2 Timing

The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its

transmission line effects must be taken into account. Figure 4 shows an equivalent test load circuit for the output

under test. Timing reference loads are not intended to be precise representations of any particular system

environment or depiction of the actual load presented by a production test. System designers should use IBIS or

other simulation tools to correlate the timing reference load to a system environment. The load capacitance value

stated is only for characterization and measurement of AC timing signals. This load capacitance value does not

indicate the maximum load the device is capable of driving.

7.4 Device Functional Modes

DMD functional modes are controlled by the DLPC6421 display controller. See the DLPC6421 display controller

data sheet or contact a TI applications engineer.

7.5 Optical Interface and System Image Quality Considerations

TI assumes no responsibility for end-equipment optical performance. Achieving the desired end-equipment

optical performance involves making trade-offs between numerous component and system design parameters.

Optimizing system optical performance and image quality strongly relate to optical system design parameter

trades. Although it is not possible to anticipate every conceivable application, projector image quality and optical

performance is contingent on compliance to the optical system operating conditions described in the following

sections.

7.5.1 Numerical Aperture and Stray Light Control

The angle defined by the numerical aperture of the illumination and projection optics at the DMD optical area

should be the same. This angle should not exceed the nominal device micromirror tilt angle unless appropriate

apertures are added in the illumination and/or projection pupils to block out flat-state and stray light from the

projection lens. The micromirror tilt angle defines DMD capability to separate the "ON" optical path from any

other light path, including undesirable flat-state specular reflections from the DMD window, DMD border

structures, or other system surfaces near the DMD such as prism or lens surfaces. If the numerical aperture

exceeds the micromirror tilt angle, or if the projection numerical aperture angle is more than two degrees larger

than the illumination numerical aperture angle (and vice versa), contrast degradation and objectionable artifacts

in the display border and/or active area could occur.

7.5.2 Pupil Match

TI’s optical and image quality specifications assume that the exit pupil of the illumination optics is nominally

centered within 2° of the entrance pupil of the projection optics. Misalignment of pupils can create objectionable

artifacts in the display border and/or active area, which may require additional system apertures to control,

especially if the numerical aperture of the system exceeds the pixel tilt angle.

7.5.3 Illumination Overfill

The active area of the device is surrounded by an aperture on the inside DMD window surface that masks

structures of the DMD chip assembly from normal view, and is sized to anticipate several optical operating

conditions. Overfill light illuminating the window aperture can create artifacts from the edge of the window

aperture opening and other surface anomalies that may be visible on the screen. The illumination optical system

should be designed to limit light flux incident anywhere on the window aperture from exceeding approximately

10% of the average flux level in the active area. Depending on the particular system optical architecture, overfill

light may have to be further reduced below the suggested 10% level in order to be acceptable.

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