SSM3582 datasheet(35/59 Pages) AD

35 / 59 page

Data Sheet

SSM3582

Rev. 0| Page 35 of 59

HIGH FREQUENCY CLIPPER

The high frequency clipper can be controlled via the

DAC_CLIP_L bits (Register 0x14, Bits[7:0]) and the

DACL_CLIP_R bits (Register 0x15, Bits[7:0]).

These bits determine the clipper threshold, relative to full scale.

When enabled, the clipper digitally clips the signal after the

DAC interpolation.

EMI NOISE

The SSM3582 uses a proprietary modulation and spread

spectrum technology to minimize EMI emissions from the

device. The SSM3582 passes FCC Class-B emissions testing

with an unshielded 20 inch cable using ferrite bead-based

filtering. For applications that have difficulty passing FCC

Class-B emission tests, the SSM3582 includes an ultralow EMI

emissions mode that significantly reduces the radiated emissions at

the Class-D outputs, particularly above 100 MHz. Note that

reducing the supply voltage greatly reduces radiated emissions.

OUTPUT MODULATION DESCRIPTION

The SSM3582 uses three level, Σ-Δ output modulation. Each

output can swing from ground to PVDD, and vice versa. Ideally,

when no input signal is present, the output differential voltage is

0 V because there is no need to generate a pulse. In a real-world

situation, noise sources are always present.

Due to this constant presence of noise, a differential pulse is

occasionally generated in response to this stimulus. A small

amount of current flows into the inductive load when the

differential pulse is generated. However, typically, the output

differential voltage is 0 V. This feature ensures that the current

flowing through the inductive load is small.

When the user sends an input signal, an output pulse is generated

to follow the input voltage. The differential pulse density is

increased by raising the input signal level. Figure 84 depicts

three-level, Σ-Δ output modulation with and without input

stimulus.

OUTPUT > 0V

+5V

OUTx+

+5V

OUTx–

+5V

VOUT

OUTPUT < 0V

+5V

OUTx+

+5V

OUTx–

–5V

VOUT

OUTPUT = 0V

OUTx+

+5V

OUTx–

+5V

–5V

VOUT

Figure 84. Three-Level, Σ-Δ Output Modulation With and Without Input Stimulus

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