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SSM3582 Datasheet(PDF) 28 Page - Analog Devices |
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SSM3582 Datasheet(HTML) 28 Page - Analog Devices |
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28 / 59 page ![]() SSM3582 Data Sheet Rev. 0| Page 28 of 59 Table 16. ADDRx Pins to I2C Device Address and TDM Slot Mapping ADDRx Pin State1 Device Address Default TDM Slot ADDR0 ADDR1 MONO = 0 MONO = 1 0 0 0x10 1, 2 1 0 1 0x11 3, 4 2 1 0 0x12 5, 6 3 1 1 0x13 7, 8 4 0 Pull-down 0x14 9, 10 5 0 Pull-up 0x15 11, 12 6 1 Pull-down 0x16 13, 15 7 1 Pull-up 0x17 15, 16 8 Pull-down 0 0x18 17, 18 9 Pull-down 1 0x19 19, 20 10 Pull-up 0 0x1A 21, 22 11 Pull-up 1 0x1B 23, 24 12 Pull-down Pull-down 0x1C 25, 26 13 Pull-down Pull-up 0x1D 27, 28 14 Pull-up Pull-down 0x1E 29, 30 15 Pull-up Pull-up 0x1F 31, 32 16 1 0 = connect to ground, 1 = connect to DVDD. In the case of a pull-down state, connect to ground via a 47 kΩ resistor. In the case of a pull-up state, connect to DVDD via a 47 kΩ resistor. I2C Read and Write Operations Figure 72 shows the timing of a single-word write operation. Every ninth clock, the SSM3582 issues an acknowledge by pulling SDA low. Figure 73 shows the timing of a burst mode write sequence. This figure shows an example where the target destination registers are two bytes. The SSM3582 knows to increment its subaddress register every byte because the requested subaddress corresponds to a register or memory area with a byte word length. The timing of a single-word read operation is shown in Figure 74. Note that the first R/W bit is 0, indicating a write operation, because the subaddress must still be written to set up the internal address. After the SSM3582 acknowledges the receipt of the subaddress, the master must issue a repeated start command, followed by the chip address byte with the R/W set to 1 (read). This repeated command causes the SSM3582 SDA to reverse and to begin driving data back to the master. The master then responds every ninth pulse with an acknowledge pulse to the SSM3582. Refer to Table 17 for a list of abbreviations in Figure 72 through Figure 75. Table 17. Abbreviations for Figure 72 Through Figure 75 Symbol Meaning S Start bit P Stop bit AM Acknowledge (ACK used in Figure 72 through Figure 75) by master AS Acknowledge (ACK used in Figure 72 through Figure 75) by slave |
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