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HCPL-0721 Datasheet(PDF) 8 Page - Broadcom Corporation.

Part # HCPL-0721
Description  40-ns Propagation Delay, CMOS Optocoupler
PDF  21 Pages
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Manufacturer  BOARDCOM [Broadcom Corporation.]
Direct Link  http://www.broadcom.com
Logo BOARDCOM - Broadcom Corporation.

HCPL-0721 Datasheet(HTML) 8 Page - Broadcom Corporation.

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Broadcom
AV02-0876EN
8
HCPL-0720, HCPL-7720, HCPL-0721,
and HCPL-7721 Data Sheet
40-ns Propagation Delay, CMOS Optocoupler
Package Characteristics
Common Mode
|CMH|
10
20
—
kV/
μsVI= VDD1, VO> 0.8 VDD1,
VCM = 1000V VI = 0V,
VO > 0.8V, VCM = 1000V
d
Transient Immunity at Logic High
Output
——
—
Common Mode Transient Immunity
at Logic Low Output
|CML|10
20
—
Input Dynamic Power Dissipation
Capacitance
CPD1
—60
—
pF
e
Output Dynamic Power Dissipation
Capacitance
CPD2
—10
—
a. tPHL propagation delay is measured from the 50% level on the falling edge of the VI signal to the 50% level of the falling edge of the VO signal.
tPLH propagation delay is measured from the 50% level on the rising edge of the VI signal to the 50% level of the rising edge of the VO signal.
b. PWD is defined as |tPHL – tPLH|. %PWD (percent pulse width distortion) is equal to the PWD divided by pulse width.
c. tPSK is equal to the magnitude of the worst-case difference in tPHL and/or tPLH that will be seen between units at any given temperature within
the recommended operating conditions.
d. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 0.8VDD2. CML is the maximum common
mode voltage slew rate that can be sustained while maintaining VO < 0.8V. The common mode voltage slew rates apply to both rising and
falling common mode voltage edges.
e. Unloaded dynamic power dissipation is calculated as follows: CPD × VDD2 × f + IDD × VDD, where f is switching frequency in MHz.
Parameter
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Fig.
Note
Input-Output Momentary
Withstand Voltage
–072X
VISO
3750
—
—
Vrms
RH ≤ 50%,
t = 1 min,
TA = 25°C
a, b, c
a. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
b. In accordance with UL1577, each HCPL-072X is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second (leakage
detection current limit, II-O ≤ 5 μA). Each HCPL-772X is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second (leakage
detection current limit. II-O ≤ 5 μA).
c. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating.
–772X
3750
—
—
Option 020
5000
—
—
Input-Output Resistance
RI-O
—
1012
—Ω
VI-O = 500 Vdc
a
Input-Output Capacitance
CI-O
—
0.6
—
pF
f = 1 MHz
Input Capacitance
CI
—3.0
—
d
d. CI is the capacitance measured at pin 2 (VI).
Input IC Junction-to-Case
Thermal Resistance
–772X
θjci
—
145
—
°C/W
Thermocouple
located at center
underside of
package
–072X
—
160
—
Output IC Junction-to-Case
Thermal Resistance
–772X
θjco
—
140
—
°C/W
–072X
—
135
—
Package Power Dissipation
PPD
—
—
150
mW
Parameter
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Fig.
Note



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