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RFPIC12C509AF Datasheet(PDF) 55 Page - Microchip Technology |
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RFPIC12C509AF Datasheet(HTML) 55 Page - Microchip Technology |
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55 / 104 page ![]() © 2001 Microchip Technology Inc. Preliminary DS70031A-page 53 rfPIC12C509AG/509AF 8.8 Power-Down Mode (SLEEP) The SLEEP mode is designed to offer a very low cur- rent power-down mode. The user can wake-up from SLEEP through a change on input pins or through a Watchdog Timer time-out. Several oscillator options are also made available to allow the part to fit the appli- cation, including an internal 4 MHz oscillator. The EXTRC oscillator option saves system cost while the LP crystal option saves power. A set of configuration bits are used to select various options. A device may be powered down (SLEEP) and later powered up (Wake-up from SLEEP). 8.8.1 SLEEP The Power-down mode is entered by executing a SLEEP instruction. If enabled, the Watchdog Timer will be cleared but keeps running, the TO bit (STATUS<4>) is set, the PD bit (STATUS<3>) is cleared and the oscillator driver is turned off. The I/O ports maintain the status they had before the SLEEP instruction was executed (driving high, driving low, or hi-impedance). It should be noted that a RESET generated by a WDT time-out does not drive the MCLR pin low. For lowest current consumption while powered down, the T0CKI input should be at VDD or VSS and the GP3/ MCLR/VPP pin must be at a logic high level (VIHMC)if MCLR is enabled. 8.8.2 WAKE-UP FROM SLEEP The device can wake-up from SLEEP through one of the following events: 1. An external RESET input on GP3/MCLR/VPP pin, when configured as MCLR. 2. A Watchdog Timer time-out Reset (if WDT was enabled). 3. A change on input pin GP0, GP1, or GP3/ MCLR/VPP when wake-up on change is enabled. These events cause a device RESET. The TO,PD,and GPWUF bits can be used to determine the cause of device RESET. The TO bit is cleared if a WDT time-out occurred (and caused wake-up). The PD bit, which is set on power-up, is cleared when SLEEP is invoked. The GPWUF bit indicates a change in state while in SLEEP at pins GP0, GP1, or GP3 (since the last time there was a file or bit operation on GP port). The WDT is cleared when the device wakes from sleep, regardless of the wake-up source. Caution: Right before entering SLEEP, read the input pins. When in SLEEP, wake up occurs when the values at the pins change from the state they were in at the last read- ing. If a wake-up on change occurs and the pins are not read before reentering SLEEP, a wake up will occur immediately even if no pins change while in SLEEP mode. |
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