DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
10
Preliminary
Version: DM562P-DS-P02
February 28, 2001
UART Clock (pci only)
The internal clock of the virtual UART logic is fixed at
1.8432MHz. The clock is derived from the MSCLK
signal from the DM6582 DSP, or an external 30Mhz
crystal. The UART 1.8432MHz clock will be obtained
by division. When the operating frequency of the
DM6588 controller changes, the divider should be
changed accordingly. This divider is specified by the
Configuration Register which can be written by the
DM6588 controller. The address mapping of the
register is D400H: (DM6588 controller memory
mapping)
Bit 0: Always 0.
Bit 6-1: define the clock divider range from 2 to 64
(even number).
Bit 7: Not used.
UART Baud Generator Divisor Latch Register:
Address EC00H ( pci only )
Read only
bit7
bit6
bit5
bit4
bit3
bit2
bit1 bit0
dat7 dat6 dat5 dat4 dat3 dat2 dat1 dat0
By reading this register, the micro-controller can
monitor the value of the low byte divisor latch of the
virtual UART baud generator (see DLL in next section)
and determine the baud rate clock itself.
Modem Status Control Register (MSCR):
Address E000H ( pci only )
Write only
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
0000
/CTS /DSR /DCD
/RI
This register contains information about the line status
of the modem. The available signals are Ring Detect
(/RI), Carrier Detect (/DCD), Data Set Ready (/DSR)
and Clear To Send (/CTS).
Modem Output Port 1 Register: Address D000H
Write only
bit7
bit6
bit5
bit4 bit3
bit2
bit1
bit0
/Voice Voice
-sel2
Voice
-Sel1
/POR
These 4 bits control the DM6588 output ports.
Modem Output Port 2 Register: Address D800H
Write only
bit7
bit6
bit5
bit4 bit3
bit2
bit1
bit0
/MUT
E
/PUL
SE
/CID
These 3 bits control the DM6588 output ports.
PCI Vender ID Low Byte Data Port: Address F800H
(pci only)
Write only
This port configures PCI Vender ID low byte.( Offset
00 of PCI configuration register space)
PCI Vender ID High Byte Data Port: Address
F801H (pci only)
Write only
This port configures PCI Vender ID high byte.
(Offset 01 of PCI configuration register space)
PCI Device ID Low Byte Data Port: Address F802H
Write only
This port configures PCI Device ID low byte.
(Offset
02 of PCI configuration register space)
PCI Device ID High Byte Data Port: Address F803H
Write only
This port configures PCI Device ID low byte.( Offset
00 of PCI configuration register space)
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