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DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
20
Preliminary
Version: DM562P-DS-P02
February 28, 2001
Key to Default
In the register description that follows, the default
column takes the form <Reset Value>
Where：
<Reset Value>:
1
Bit set to logic one
0
Bit set to logic zero
X
No default value
<Access Type>:
RO = Read only
RW = Read/Write
R/C: means Read / Write & Write "1" for Clear.
_WR = Controller Write
_RD = Controller Read
Vendor ID
Device ID
Status (with bit 4 set to 1)
Command
Revisio
Latency Timer
Cach Line Size
Class Code = 070002
Header Type
BIST
Bass Address Register CBIO
Reserved
00H
04H
08H
0CH
10H
14H
18H
1CH
20H
24H
28H
2CH
30H
34H
38H
3CH
Reserved
Subsystem Vendor ID
Subsystem ID
Reserved
Cap_Ptr
Max_Lat
Min_Gnt
Interrupt Pin = 1
Interrupt Line
Configuration Register Structure
40H
44H
48H
4CH
50H
54H
Power Management Control and Status
Next Item Pointer
Capability ID
Power Management Capability
Reserved
Reserved
Reserved
Reserved
Reserved
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