ADF5610 datasheet(7/51 Pages) AD

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Data Sheet

ADF5610

Rev. 0 | Page 7 of 51

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

POWER-ON RESET

Typical Reset Voltage on

DVDD

700

Minimum DVDD Voltage

for No Reset

1.5

Power-On Reset Delay

250

µs

VCO OPEN-LOOP PHASE

NOISE

RFOUT at 7.3 GHz

10 kHz Offset

−92

dBc/Hz

100 kHz Offset

−115

dBc/Hz

1 MHz Offset

−135

dBc/Hz

10 MHz Offset

−155

dBc/Hz

100 MHz Offset

−168

dBc/Hz

RFOUT at 10 GHz

10 kHz Offset

−92

dBc/Hz

100 kHz Offset

−114

dBc/Hz

1 MHz Offset

−135

dBc/Hz

10 MHz Offset

−155

dBc/Hz

100 MHz Offset

−164

dBc/Hz

RFOUT at 11 GHz

10 kHz Offset

−89

dBc/Hz

100 kHz Offset

−112

dBc/Hz

1 MHz Offset

−132

dBc/Hz

10 MHz Offset

−152

dBc/Hz

100 MHz Offset

−161

dBc/Hz

RFOUT at 14.6 GHz

10 kHz Offset

−87

100 kHz Offset

−109

dBc/Hz

1 MHz Offset

−130

dBc/Hz

10 MHz Offset

−150

dBc/Hz

100 MHz Offset

−163

dBc/Hz

PLL

Phase Noise at 20 kHz

Offset, 50 MHz Phase

Frequency Detector

(PFD) Rate

Over process with 3.3 V power supply at

25°C, measured with >200 kHz loop

bandwidth

Fast Frequency Hopping

(Autocalibration

Enabled)

<40

µs

Lock Time

Depends on loop filter bandwidth, PFD rate,

definition of lock (to within ±Hz or ±degrees

of settling), and Register 0x0A configuration

100

µs

Frequency Resolution

Depends on PFD rate and VCO output

divider setting

fPD/224

Fundamental Mode

3.5 GHz to 7.5 GHz output, at typical phase

detector frequency (fPD) of 50 MHz, typical

resolution = 3 Hz

Divider Mode

<3.5 GHz output, resolution depends on

VCO output divider setting

fPD/(224 × output

divider)

Integer Boundary Spurs

−45

dBc

Phase Detector Spurs

−105

dBc

Reference Spurs

−100

dBc

Normalized Inband Phase

Noise Floor Figure of

Merit (FOM)

Normalized to 1 Hz

ADF5610 Datasheet(PDF) 7 Page - Analog Devices

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