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ADF5610 Datasheet(PDF) 12 Page - Analog Devices |
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ADF5610 Datasheet(HTML) 12 Page - Analog Devices |
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12 / 51 page ![]() ADF5610 Data Sheet Rev. 0 | Page 12 of 51 Pin No. Mnemonic Description 39 VG Gate Voltage Bypassing. Decouple to GND with a low effective series resistance (ESR), 10 µF capacitor. 41 SCK Serial Port Interface Clock Input. 42 SDI Serial Port Data Input. 43 SEN Serial Port Interface Enable Input. Active high. 44 CEN Hardware Chip Enable Input. Active high. Logic low powers down the PLL section. 46 DVDD Digital Power Supply. 3.3 V ± 5%. Retain bias to hold the PLL register contents when powering down the PLL. 48 XREFP External Reference Input. For 50 Ω match, ac couple to the XREFP pin using a low reactance capacitor value and add a 100 Ω resistor to ground. EPAD Exposed Pad. The exposed pad or ground paddle on the backside of the package must be tied to dc ground for electrical, mechanical, and thermal reasons. Note that RF ground and dc ground are the same in this case. |
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