ADF5610 datasheet(27/51 Pages) AD

27 / 51 page

Data Sheet

ADF5610

Rev. 0 | Page 27 of 51

Lock Detect

The lock detect (LD) function verifies that the ADF5610 is

generating the desired frequency. LD is enabled by writing

in the following two ways:

•

As an output available on the SDO pin of the ADF5610

(configuration is required to use the SDO pin for LD

purposes). For more information, see the Configuring the

SDO Pin for LD Output section.

•

Reading from Register 0x12, Bit 1, where Bit 1 = 1 indicates

a locked condition and Bit 1 = 0 indicates an unlocked

condition.

The LD circuit expects the divided VCO edge and the divided

reference edge to appear at the PD within a user specified time

period (window), repeatedly. Either signal may arrive first. Only

the difference in arrival times is significant. The arrival of the

two edges within the designated window increments an internal

counter. When the count reaches and exceeds a user specified

value (Register 0x07, Bits[2:0]), the ADF5610 declares lock.

Failure in registering the two edges in any one window resets

the counter and immediately declares an unlocked condition.

Lock is deemed to be reestablished when the counter reaches

the user specified value (Register 0x07, Bits[2:0]) again.

The ADF5610 supports the following two lock detect modes:

•

Analog LD supports a fixed window size of 10 ns. Analog

LD mode is selected by writing Register 0x07, Bit 6 = 0.

•

Digital LD supports a user configurable window size,

programmed in Register 0x07, Bits[11:7]. Digital LD is

selected by writing Register 0x07, Bit 6 = 1.

Lock Detect Configuration

Optimal spectral performance in fractional mode requires CP

current and CP offset current configuration, described in detail

in the Charge Pump (CP) and Phase Detector (PD) section.

The PD frequency and settings in the CP (Register 0x09) impact

the required LD window size in fractional mode of operation.

To function properly, the required lock detect window size is

provided by Equation 10 in fractional mode and Equation 11 in

integer mode.

( )

(A)

2.66 10 (sec)

(Hz)

(A)

(Hz)

sec

CP OFFSET

D Wi

−





+×













(10)

Window

(sec)

(11)

where:

fPD is the comparison frequency of the phase detector.

ICP_OFFSET is the charge pump offset current (Register 0x09,

Bits[20:14]).

ICP is the full-scale current setting of the switching charge pump

(Register 0x09, Bits[6:0] or Register 0x09, Bits[13:7]).

If the result provided by Equation 10 is equal to 10 ns, analog

LD can be used (Register 0x07, Bit 6 = 0). Otherwise, digital LD

is necessary (Register 0x07, Bit 6 = 1). Table 11 lists the required

window size. From Table 11, select the closest value in the digital

LD window size columns to the ones calculated in Equation 10

and Equation 11, and program Register 0x07, Bits[11:10] and

Digital Window Configuration Example

For this example, assume the device is in fractional mode, with

a 50 MHz PD and the following conditions:

•

Charge pump gain of 2 mA (Register 0x09, Bits[13:7] =

0x64, Register 0x09, Bits[6:0] = 0x64)

•

Up offset (Register 0x09, Bits[22:21] = 01b)

•

Offset current magnitude of 400 μA (Register 0x09,

Bits[20:14] = 0x50)

Apply Equation 10 to calculate the required LD window size.

LD Window (sec) =

0.4 10 (A)

2.66 10 (sec)

50 10 (Hz) 2 10 (A)

50 10 (Hz)

13.33 ns

−



+×



××



Locate the Table 11 value that is closest to this result, which is, in

this case, 13.3 ≈ 13.33. To set the digital LD window size, program

010b, according to Table 11. For a given operating point, there is

typically a correct solution for the lock detect window. However,

one solution does not fit all operating points. As observed from

Equation 10 and Equation 11, if the charge pump offset or PD

frequency is changed significantly, the lock detect window may

need to be adjusted.

Table 11. Typical Digital Lock Detect Window for Various LD Timer Divide Settings, Register 0x07, Bits[9:7]

LD Timer Speed, Register 0x07, Bits[11:10]

Digital Lock Detect Window Size Nominal Value (ns)

000

001

010

011

100

101

110

111

00 (Fastest)

6.5

100

195

8.9

12.8

130

255

7.1

9.2

13.3

138

272

11 (Slowest)

7.6

10.2

15.4

172

338

ADF5610 Datasheet(PDF) 27 Page - Analog Devices

ADF5610 Datasheet(HTML) 27 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

Datasheet Download

Link URL