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DM368ZCEZ Datasheet(PDF) 52 Page - Texas Instruments

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Part # DM368ZCEZ
Description  Digital Media System-on-Chip (DMSoC)
PDF  208 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DM368ZCEZ Datasheet(HTML) 52 Page - Texas Instruments

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TMS320DM368
SPRS668C
– APRIL 2010 – REVISED JUNE 2011
www.ti.com
•
ARM ROM Boot - MMC/SD Mode
– No support for a full firmware boot. Instead, copies a second stage User Boot Loader (UBL) from
MMC/SD to ARM Internal RAM (AIM) and transfers control to the user software.
– Support for MMC/SD Native protocol (MMC/SD SPI protocol is not supported)
– Support for descriptor error detection and retry (up to 24 times) when loading UBL
– Support for up to 30KB UBL (32KB - ~2KB for RBL stack)
– SDHC boot supported by RBL
•
ARM ROM Boot - UART mode
– If the state of BTSEL[2:0] pins at reset is 011, then the UART boot mode executes. This mode
enables a small program, referred to here as a user boot loader (UBL), to be downloaded to the
on-chip ARM internal RAM via the on-chip serial UART and executed. A host program, (referred to
as serial host utility program), manages the interaction with RBL and provides a means for operator
feedback and input. The UART boot mode execution assumes the following UART settings: 24
MHz reference clock, Time-Out 500 ms, one-shot Serial RS-232 port 115.2 Kbps, 8-bit, no parity,
one stop bit Command, data, and checksum format Everything sent from the host to the device
UART RBL must be in ASCII format
– No support for a full firmware boot. Instead, loads a second stage user boot loader (UBL) via UART
to ARM internal RAM (AIM) and transfers control to the user software.
– Support for up to 30KB UBL (32KB - ~2KB for RBL stack)
•
ARM ROM Boot
– USB Mode
– No support for a full firmware boot. Instead, loads a second stage User Boot Loader (UBL) via USB
to ARM Internal RAM (AIM) and transfers control to the users software.
•
ARM ROM Boot
– SPI Mode
– The device will copy UBL to ARM Internal RAM (AIM) via SPI interface from a SPI peripheral like
SPI EEPROM. RBL will then transfer control to the UBL.
•
ARM ROM Boot
– EMAC Mode
– The device will send a boot request packet and the host/server will respond with the boot packets.
RBL will wait for all boot packets to arrive and then transfer control to the UBL which is received via
boot packets. In EMAC boot mode an I2C EEPROM or SPI EEPROM is necessary for
programming EMAC descriptor (including EMAC address for the device)
Note: If a magic number is not found in the EEPROM, then the EMAC boot mode will use a default
MAC address. In this case, there will be no magic number support.
•
ARM ROM Boot
– HPI Mode
– The Host will copy UBL to ARM Internal RAM (AIM) via HPI interface and notify the ROM
bootloader after copy is finished. RBL will then transfer control to the UBL.
The general boot sequence is shown in Figure 3-1. For more information, refer to the TMS320DM36x
DMSoC ARM Subsystem Reference Guide (literature number SPRUFG5).
52
Device Configurations
Copyright
© 2010–2011, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM368



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