TAS2564 datasheet(28/118 Pages) TI1

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TAS2564

SLASEI6A – OCTOBER 2019 – REVISED DECEMBER 2019

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The RX_SLEN[1:0] register bits set the length of the RX time slot. The length of the audio sample word within the

time slot is configured by the RX_WLEN[1:0] register bits. The RX port will left justify the audio sample within the

time slot by default, but this can be changed to right justification via the RX_JUSTIFY register bit. The TAS2564

supports mono and stereo down mix playback ([L+R]/2) via the left time slot, right time slot and time slot

configuration register bits (RX_SLOT_L[3:0], RX_SLOT_R[3:0] and RX_SCFG[1:0] respectively). By default the

device will playback mono from the time slot equal to the I2C base address offset for playback. The

RX_SCFG[1:0] register bits can be used to override the playback source to the left time slot, right time slot or

stereo down mix set by the RX_SLOT_L[3:0] and RX_SLOT_R[3:0] register bits.

If time slot selections places reception either partially or fully beyond the frame boundary, the receiver will return

a null sample equivalent to a digitally muted sample.

Table 21. TDM RX Time Slot Length

RX_SLEN[1:0]

TIME SLOT LENGTH

16-bits

24-bits

32-bits (default)

reserved

Table 22. TDM RX Sample Word Length

RX_WLEN[1:0]

LENGTH

16-bits

20-bits

24-bits (default)

32-bits

Table 23. TDM RX Sample Justification

RX_JUSTIFY

JUSTIFICATION

Left (default)

Right

Table 24. TDM RX Time Slot Select Configuration

RX_SCFG[1:0]

CONFIG ORIGIN

Mono with Time Slot equal to I2C

Address Offset (default)

Mono Left Channel

Mono Right Channel

Stereo Down Mix [L+R]/2

Table 25. TDM RX Left Channel Time Slot

RX_SLOT_L[3:0]

TIME SLOT

0x0

0 (default)

0x1

...

0xE

0xF

Table 26. TDM RX Right Channel Time Slot

RX_SLOT_R[3:0]

TIME SLOT

0x0

0x1

1 (default)

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