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TAS2564 Datasheet(PDF) 8 Page - Texas Instruments |
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TAS2564 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 118 page  8 TAS2564 SLASEI6A – OCTOBER 2019 – REVISED DECEMBER 2019 www.ti.com Product Folder Links: TAS2564 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Electrical Characteristics (continued) TA = 25 °C, VBAT = 3.8 V, (External PVDD = 12 V), VDD = 1.8 V, RL = 8Ω + 33 µH, fin = 1 kHz, SSM, fs = 48 kHz, Gain = 17.5 dBV (External PVDD Gain=18 dBV), SDZ = 1, Thermal Foldback Disabled, Measured filter free with an Audio Precision with a 22 Hz to 20 kHz un-weighted bandwidth (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VBAT power-supply rejection ratio VBAT = 3.8 V + 200 mVpp, fripple = 217 Hz 110 dB VBAT = 3.8 V + 200 mVpp, fripple = 20 kHz 95 dB AVDD power-supply rejection ratio VDD = 1.8 V + 200 mVpp, fripple = 217 Hz 102 dB VDD = 1.8 V + 200 mVpp, fripple = 20 kHz 102 dB Turn on time from release of SW shutdown No Volume Ramping 1.8 ms Volume Ramping 4.5 ms Turn off time from assertion of SW shutdown to amp Hi-Z No Volume Ramping 0.75 ms Volume Ramping 12.5 ms BOOST CONVERTER Max Output Voltage 0.1A DC load, Average voltage (w/o including ripple) 13 V Startup inrush current limit default setting 1.5 A Startup inrush limit time default setting 0.45 ms Switching Frequency PFM mode 50 kHz Current Control Mode 4 MHz Minimum Switching Frequency Current Control Mode 400 KHz Inductor Peak Current Limit default setting 5 A DIE TEMPERATURE SENSOR Resolution 8 bits Die temperature measurement range -40 150 °C Die temperature resolution 0.75 °C Die temperature accuracy ±5 °C VOLTAGE MONITOR Resolution 10 bits VBAT measurement range 2 6 V VBAT resolution 6 mV VBAT accuracy ±25 mV TDM SERIAL AUDIO PORT PCM Sample Rates & FSYNC Input Frequency 16 192 kHz SBCLK Input Frequency I2S/TDM Operation 0.512 24.57 MHz SBCLK Maximum Input Jitter RMS Jitter below 40 kHz that can be tolerated without performance degradation 1 ns RMS Jitter above 40 kHz that can be tolerated without performance degradation 10 ns SBCLK Cycles per FSYNC in I2S and TDM Modes Values: 64, 96, 128, 192, 256, 384 and 512 64 512 Cycles PCM PLAYBACK CHARACTERISTICS to fs ≤ 48 kHz fs Sample Rates 16 48 kHz Passband LPF Corner 0.454 fs Passband Ripple 20 Hz to LPF cutoff -0.3 0.3 dB Stop Band Attenuation ≥ 0.55 fs 60 dB ≥ 1 fs 65 dB Group Delay DC to 0.454 fs 8.6 1/fs |
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