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M263 Datasheet(PDF) 297 Page - Nuvoton Technology Corporation |
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M263 Datasheet(HTML) 297 Page - Nuvoton Technology Corporation |
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297 / 398 page ![]() M261/M262/M263 Mar 25, 2020 Page 297 of 398 Rev 1.02 System and peripheral can use the clock as its operating clock only when correlate clock stable index is set to 1. The clock stable index will be auto cleared when the clock source (HXTEN (CLK_PWRCTL[0]), LXTEN (CLK_PWRCTL[1]), LIRC32KEN (RTC_LXTCTL[0]), HIRCEN (CLK_PWRCTL[2]), LIRCEN (CLK_PWRCTL[3]), HIRC48EN (CLK_PWRCTL[18]) and PD (CLK_PLLCTL[16])) are disabled. Besides, the clock stable index of HXT, HIRC, HIRC48 and PLL will be auto cleared when chip enters power-down and clock stable counter will re-count after chip wake-up if correlate clock is enabled. 6.3.3 System Clock and SysTick Clock The system clock has 6 clock sources which are generated from clock generator block. The clock source switch depends on the register HCLKSEL (CLK_CLKSEL0[2:0]). The block diagram is shown in Figure 6.3-5. 011 010 001 PLLFOUT LXT HXT LIRC HCLKSEL (CLK_CLKSEL0[2:0]) HIRC 000 HCLKDIV (CLK_CLKDIV0[3:0]) CPU in Power Down Mode CPU AHB APB1 CPUCLK HCLK PCLK1 111 1/(HCLKDIV+1) APB0 PCLK0 100 HIRC48 Note: Before clock switching, both the pre-selected and newly selected clock sources must be turned on and stable. Figure 6.3-5 System Clock Block Diagram There are two clock fail detectors to observe HXT and LXT clock source and they have individual enable and interrupt control. When HXT detector is enabled, the HIRC clock is enabled automatically. When LXT detector is enabled, the LIRC clock is enabled automatically. When HXT clock detector is enabled, the system clock will auto switch to HIRC if HXT clock stop being detected on the following condition: system clock source comes from HXT or system clock source comes from PLL with HXT as the input of PLL. If HXT clock stop condition is detected, the HXTFIF (CLK_CLKDSTS[0]) is set to 1 and chip will enter interrupt if HXTFIE (CLK_CLKDCTL[5]) is set to 1. HXT clock source stable flag, HXTSTB (CLK_STATUS[0]), will be cleared if HXT stops when using HXT fail detector function. User can try to recover HXT by disable HXT and enable HXT again to check if the clock stable bit is set to 1 or not. If HXT clock stable bit is set to 1, it means HXT is recover to oscillate after re-enable action and user can switch system clock to HXT again. The HXT clock stop detect and system clock switch to HIRC procedure is shown in Figure 6.3-6. |
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